Datasheet

8−9
SLLS535E − April 2008 TUSB6250
8.4 FUNADR: Function Address Register (XDATA at F009)
The FUNADR register contains the current setting of the USB device address assigned to the USB function
of the TUSB6250 by the USB host. After a power-up reset or a USB reset, the default function address is 00h.
During the enumeration of the USB function of the TUSB6250 by the host, the MCU and firmware load the
assigned address from the host to the FA[6:0] bits of the FUNADR register on receiving a USB Set_Address
request at the control endpoint.
The HS bit of the FUNADR register reflects the TUSB6250’s current connection speed on the USB bus.
The FUNADR register is cleared by a power-up reset, a WDT reset, or a USB reset (regardless of whether
the function reset connection bit is set in the USBCTL register).
76543210
HS FA6 FA5 FA4 FA3 FA2 FA1 FA0
R/O R/W R/W R/W R/W R/W R/W R/W
BIT
NAME RESET FUNCTION
6−0 FA[6:0] 0000000 These bits define the current device address assigned to the function. The MCU writes a value to this
register as a result of the SET-ADDRESS host command.
7 HS 0 High-speed connection status. This bit reflects the type of USB connection speed on the upstream
transceivers. This bit is set automatically by the transceiver selection logic and the MCU can only read
this bit.
HS = 0 Indicates full-speed connection
HS = 1 Indicates high-speed connection
8.5 UTMICFG: UTMI Configuration Status Register (XDATA at F00A)
The UTMICFG register provides the current status of the UTMI configuration of the integrated USB 2.0
UTMI-compliant PHY.
The UTMICFG register is cleared by a power-up reset or a WDT reset. A USB reset cannot clear the UTMICFG
register.
765 4 3 2 1 0
SUSPNST VBUS XCVR_SEL TERM_SELECT LINE_STATE1 LINE_STATE0 OP_MOD1 OP_MOD0
R/O R/O R/O R/O R/O R/O R/O R/O
BIT
NAME RESET FUNCTION
1−0 OP_MOD[1:0] 01 These bits define the current device operation mode to USB 2.0 PHY.
3−2 LINE_STATE[1:0] Bus This bit reflects the current line_state on DP and DM. (See Note 1)
4 TERM_SELECT 1 USB 2.0 transceiver termination select.
TERM_SELECT = 0 HS termination is enabled.
TERM_SELECT = 1 FS termination is enabled.
5 XCVR_SEL 1 USB 2.0 transceiver select.
XCVR_SEL = 0 HS transceiver is enabled.
XCVR_SEL = 1 FS transceiver is enabled.
6 VBUS Bus VBUS status. (See Note 1)
VBUS = 0 VBUS power is not present.
VBUS = 1 VBUS power is present.
7 SUSPNST 0 Suspend status. This bit, when set, indicates the TUSB6250 is currently in USB suspend
state. Whether or not the core clock is still running depends on the setting of the LPEN bit
in the USBCTL register.
SUSPNST = 0 The TUSB6250 is not in the USB suspend state.
SUSPNST = 1 The TUSB6250 is in the USB suspend state.
NOTE 1: The reset value for both the LINE_STATE and VBUS are denoted as bus, which means that their actual reset value depends
on the actual condition of the USB bus data line and VBUS during reset.