Datasheet
8−2
SLLS535E − April 2008TUSB6250
The following are some important notes regarding the USBCTL register.
• The contents of this register are not affected by the USB reset.
• The signaling connect/disconnect is totally controlled by the boot code or firmware by setting/clearing the
CONT bit of this register. The TUSB6250 hardware does not perform any automatic action for this function.
8.1.2 USB Reset
The TUSB6250 can detect a USB reset condition. When a USB reset occurs, the TUSB6250 responds by
setting the function reset request (RSTR) bit in the USB status register (see USBSTA: USB status register
(XDATA at F008), Section 8.2). If the corresponding function reset interrupt enable (RSTR) bit in the
USBMSDK: USB interrupt mask register (XDATA at F007), is set, an MCU interrupt is generated and the USB
function reset (0x38) vector appears in the vector interrupt register (see VECINT: Vector Interrupt Register
(ESFR at F7), Section 7.2.1).
8.1.3 USB 2.0 Test Mode
The USB 2.0 specification defines some additional high-speed test modes. The USB 2.0 test mode function
implemented in the TUSB6250 is accomplished by both hardware and firmware. The MCU and firmware are
responsible for decoding the test mode commands from the USB host and then selecting one of the four test
modes based on the command received by setting the HSTM bits in the USBCTL register. Additional details
regarding the hardware and firmware behaviors in the test mode are described below:
• HSTM = 001 (Test_SE0_NAK): The TUSB6250 hardware only treats this mode as a normal operation
mode and does not perform any special test-mode function. The firmware must set NAK bits to 1 so that
the hardware can behave as Test_SE0_NAK defined and respond to any IN token packet with a NAK
handshake, as long as the packet CRC is correct.
• HSTM = 010 (Test Mode Test_J): The TUSB6250 hardware automatically performs the required task in
this test mode. The firmware only must set HSTM bits to initiate the test.
• HSTM = 011 (Test Mode Test_K): The TUSB6250 hardware automatically performs the required task in
this test mode. The firmware only must set this bit to initiate the test.
• HSTM = 100 (Test Mode Test_Packet): The TUSB6250 hardware supports this mode; however, it requires
the firmware to load the data payload into the X-buffer of IN-endpoint-0 and specify the byte-count
information. The hardware sends the packet repetitively.