Datasheet

Microcontroller Unit (MCU)

6−1

SLLS535E − April 2008 TUSB6250

6 Microcontroller Unit (MCU)

The embedded MCU is a high-performance version (8051 Warp core) of the standard 8-bit 8051

microcontroller, requiring just two clocks per machine cycle, while keeping functional compatibility with the

standard part. This allows the embedded MCU to run up to six times faster than the standard part for the same

power consumption. The ratio of two clock cycles to one machine cycle is constant across the instruction set

and all addressing modes, so as to maintain instruction execution-time compatibility with other devices.

The MCU is the central processing unit controlling the overall activity of the TUSB6250 controller with the

application firmware, which is loaded into the TUSB6250 controller’s internal embedded code RAM space

from either the external I

C EEPROM or the USB host in a PC.

The MCU, with its firmware, through accessing all the related USB and ATA/ATAPI registers, can configure

the USB functions of the TUSB6250 controller, such as the characteristics of endpoints, remote wakeup

capability, low-power-enable feature, interrupts to MCU, GPIO configuration, etc. It also configures the

ATA/ATAPI interface controller behavior, such as the mode of the TUSB6250 controller’s internal data

movement, ATA/ATAPI interface data transfer modes, and timing.

6.1 MCU Memory Map

The industry standard 8051 microcontroller normally organizes its complete memory space into three major

categories: program memory, internal data memory, and external data memory. Following this convention, the

embedded MCU memory space of the TUSB6250 controller is referred to throughout this data manual as:

• Program memory is also referred to as the code space.

• Internal data memory refers to the 1152 bytes of IDATA memory.

• External data memory refers to the internal XDATA space, including the MMRs and 4K-byte data buffers

of the EDB, because the data memory, although integrated in this device, is external to the embedded

MCU core.

Figure 6−1 illustrates the MCU memory map. Note that the internal IDATA space is not shown, because it is

allocated in the same location as the standard 8051 microcontroller (starting from 0x00 hex). The enhanced

IDATA memory embedded in the TUSB6250 controller, with a size of 1152 bytes, can be used for multitasking

firmware to speed up execution.

The shaded areas represent the internal ROM/RAM.

• The 8K bytes of ROM containing the boot code are mapped to address range 0x0000−0x1FFF.

• The 8K bytes of RAM (fixed as code space for application firmware) are mapped to address range

0x2000−0x3FFF.

• The other 8K bytes of RAM (fixed as sector FIFO), as shown in the unshaded area enclosed with the dotted

line, are directly accessible by the internal ATA/ATAPI interface controller.

• The 4K-byte data buffers of the end point descriptor block (EDB) are mapped to address range

(E000−EFFF), which are implemented by the single-port RAM (SPRAM).

• Memory-mapped registers (MMRs) and other buffers are mapped to address range (F000−F0F9) and are

all implemented by registers. The MMRs include registers used for USB, I

C, ATA/ATAPI interface

configuration, GPIO, pullup/pulldown control, etc.

• The actual configuration of the middle 24K bytes of RAM (4000−9FFF), which are part of the 40K bytes

of configurable RAM for code and data space, depends on the RAMPARTN bits in the MODECNFG

− After power up, RAMPARTN = 00 is the default. This configures the 24K bytes RAM as code space

with the address mapped to 4000−9FFF and yields total 32K bytes of code RAM from 2000−9FFF