Datasheet

Main Features
2−1
SLLS535E − April 2008 TUSB6250
2 Main Features
2.1 Universal Serial Bus (USB)
• Fully compliant with USB 2.0 specification: TID #40390418
• Integrated USB 2.0 UTMI compliant transceiver (PHY)
• Supports USB high speed (HS, 480 Mbits/sec) and full speed (FS, 12 Mbits/sec)
• Supports USB suspend/resume and remote wake-up operation
• Supports USB device-unique serial number by using on-chip unique die ID
• Supports eight configurable endpoints (four input and four output) with a user-programmable buffer size,
in addition to the default control endpoint (endpoint 0):
− Each endpoint can be configured for interrupt and bulk (double-buffered) transfers.
− All endpoints share the 4K-byte data buffer implemented in the SPRAM (single-port SRAM).
2.2 Microcontroller Unit (MCU)
• Integrated 60-MHz 8051 microcontroller with two clocks per cycle (up to 30 MIPS)
• Application code is loadable from either the USB host or the external EEPROM (via the I
2
C interface)
• 8K bytes of ROM for the boot loader
• 1152 bytes of RAM with multiple bank selectable capability for the internal data buffer (IDATA space)
• 40K bytes of RAM, configurable for either code or data space, which provides flexibility to the end product
application:
− 32K-byte code RAM with 8K-byte sector buffer data space
− 16K-byte code RAM with 24K-byte sector buffer data space
− 8K-byte code RAM with 32K-byte sector buffer data space
• Master I
2
C interface controller for external device accesses capable of 100 Kbits/sec or 400 Kbits/sec
transfer speed.
• Up to 13 GPIOs and three general-purpose open-drain outputs can be used for end-product-specific
functions.
2.3 ATA/ATAPI Interface Controller
• Supports USB mass storage device class specification bulk-only transfer protocol
• Glueless interface to ATA and ATAPI drives with full ATA and ATAPI protocol support
• High-performance DMA engine supports all PIO, multiword DMA, and UDMA transfer modes up to UDMA
mode 4 (UDMA-66 or ATA-66).
• Correctly handles all 13 cases in bulk-only transfer protocol under all supported transfer modes.
• Fully programmable ATA/ATAPI interface access timing
• Provides multiple flexible transfer options to achieve both high-speed transfer by the state machine and
high flexibility with MCU involvement:
− Fully manual transfer (both command and data) by the MCU
− Semi-automatic transfer with command transfer by the MCU and data transfer by the state machine
− High-performance fully automatic data transfer mainly by the state machine with few MCU
involvements
• Supports mass-storage devices compatible with the ATA/ATAPI-5 specification:
− Hard-disk drive
− DVD/CD-ROM