Datasheet

USB Registers
27
SLLS519H—January 2010 TUSB3410, TUSB3410I
5.4 USBCTL: USB Control Register (Addr:FFFCh)
Unlike the rest of the registers, this register is cleared by the power-up reset signal only. The USB reset cannot
reset this register (see Figure 5−1).
765 4 32 1 0
CONT IREN RWUP FRSTE RSV RSV SIR DIR
R/W R/W R/C R/W R/W R/W R/W R/W
BIT
NAME RESET
0 DIR 0
As a response to a setup packet, the MCU decodes the request and sets/clears this bit to reflect the data transfer
direction.
DIR = 0
DIR = 1
USB data-OUT transaction (from host to TUSB3410)
USB data-IN transaction (from TUSB3410 to host)
1 SIR 0
SETUP interrupt-status bit. This bit is controlled by the MCU to indicate to the hardware when the SETUP interrupt
is being serviced.
SIR = 0
SIR = 1
SETUP interrupt is not served. The MCU clears this bit before exiting the SETUP interrupt routine.
SETUP interrupt is in progress. The MCU sets this bit when servicing the SETUP interrupt.
2 RSV 0 Reserved = 0
3 RSV 0 This bit must always be written as 0.
4 FRSTE 1
Function reset-connection bit. This bit connects/disconnects the USB function reset to/from the MCU reset.
FRSTE = 0
FRSTE = 1
Function reset is not connected to MCU reset
Function reset is connected to MCU reset
5 RWUP 0
Device remote wakeup request. This bit is set by the MCU and is cleared automatically.
RWUP = 0
RWUP = 1
Writing a 0 to this bit has no effect
When MCU writes a 1, a remote-wakeup pulse is generated.
6 IREN 0
IR mode enable. This bit is set and cleared by firmware.
IREN = 0
IREN = 1
IR encoder/decoder is disabled, UART mode is selected
IR encoder/decoder is enabled, UART mode is deselected
7 CONT 0
Connect/disconnect bit
CONT = 0
CONT = 1
Upstream port is disconnected. Pullup disabled.
Upstream port is connected. Pullup enabled.
5.5 MODECNFG: Mode Configuration Register (Addr:FFFBh)
This register is cleared by the power-up reset signal only. The USB reset cannot reset this register.
765 4 32 1 0
RSV
RSV RSV RSV CLKSLCT CLKOUTEN SOFTSW TXCNTL
R/O R/O R/O R/O R/W R/W R/W R/W
BIT
NAME RESET FUNCTION
0 TXCNTL 0
Transmit output control: Hardware or firmware switching select for 3-state serial output buffer.
TXCNTL = 0
TXCNTL = 1
Hardware automatic switching is selected
Firmware toggle switching is selected
1 SOFTSW 0
Soft switch: Firmware controllable 3-state output buffer enable for serial output terminal.
SOFTSW = 0
SOFTSW = 1
Serial output buffer is enabled
Serial output buffer is disabled
2 CLKOUTEN 0
Clock output enable: Enables/disables the clock output at CLKOUT terminal.
CLKOUTEN = 0
CLKOUTEN = 1
Clock output is disabled. Device drives low at CLKOUT terminal.
Clock output is enabled
3 CLKSLCT 0
Clock output source select: Selects between 3.556-MHz fixed clock or UART baud out clock as output
clock source.
CLKSLCT = 0
CLKSLCT = 1
UART baud out clock is selected as clock output
Fixed 3.556-MHz free running clock is selected as clock output
4−7 RSV 0 Reserved