Datasheet

Introduction
2
SLLS519H—January 2010TUSB3410, TUSB3410I
8052
Core
Clock
Oscillator
12 MHz
PLL
and
Dividers
10K × 8
ROM
8 8
2 × 16-Bit
Timers
16K × 8
RAM
8
8 4
Port 3
2K × 8
SRAM
8
8
I
2
C
Controller
8
UART−1
CPU-I/F
Suspend/
Resume
8
UBM
USB Buffer
Manager
88
USB
Serial
Interface
Engine
USB
TxR
TDM
Control
Logic
P3.4
P3.3
P3.1
P3.0
I
2
C Bus
DP, DM
8
DMA-1
DMA-3
RTS
CTS
DTR
DSR
M
U
X
IR
Encoder
SOUT/IR_SOUT
M
U
X
IR
Decoder
SIN/IR_SIN
24 MHz
SIN
SOUT
Figure 1−2. USB-to-Serial (Single Channel) Controller Block Diagram