Datasheet

I
2
C Port
61
SLLS519H—January 2010 TUSB3410, TUSB3410I
10.6 Page-Write Operation
The page-write operation is initiated in the same way as byte write, with the exception that a stop condition
is not generated after the first EPROM [DATA] is transmitted. The following describes the sequence of writing
32 bytes in page mode.
Device Address + EPROM [High Byte]
• The MCU clears bit 0 (SWR) in the I2CSTA register. This forces the I
2
C controller to not generate a
stop condition after the contents of the I2CDAO register are transmitted.
• The MCU writes the device address (bit 0 (R/W) = 0) to the I2CADR register (write operation).
• The MCU writes the high byte of the EEPROM address into the I2CDAO register
• Bit 3 (TXE) in the I2CSTA register is cleared (indicating busy).
• The contents of the I2CADR register are transmitted to the device (preceded by start condition on
SDA).
• The contents of the I2CDAO register are transmitted to the device (EEPROM address).
• Bit 3 (TXE) in the I2CSTA register is set and interrupts the MCU, indicating that the I2CDAO register
contents have been transmitted.
EPROM [Low Byte]
• The MCU writes the low byte of the EEPROM address into the I2CDAO register.
• Bit 3 (TXE) in the I2CSTA register is cleared (indicates busy).
• The contents of the I2CDAO register are transmitted to the device (EEPROM address).
• Bit 3 (TXE) in the I2CSTA register is set and interrupts the MCU, indicating that the I2CDAO register
contents have been transmitted.
EPROM [DATA]—31 Bytes
• The data to be written to the EEPROM are written by the MCU into the I2CDAO register.
• Bit 3 (TXE) in the I2CSTA register is cleared (indicates busy).
• The contents of the I2CDAO register are transmitted to the device (EEPROM data).
• Bit 3 (TXE) in the I2CSTA register is set and interrupts the MCU, indicating that the I2CDAO register
contents have been transmitted.
• This operation repeats 31 times.
EPROM [DATA]—Last Byte
• The MCU sets bit 0 (SWR) in the I2CSTA register. This forces the I
2
C controller to generate a stop
condition after the contents of the I2CDAO register are transmitted.
• The MCU writes the last date byte to be written to the EEPROM, into the I2CDAO register.
• Bit 3 (TXE) in the I2CSTA register is cleared (indicates busy).
• The contents of the I2CDAO register are transmitted to EEPROM (EEPROM data).
• Bit 3 (TXE) in the I2CSTA register is set and interrupts the MCU, indicating that the I2CDAO register
contents have been transmitted.
• The I
2
C controller generates a stop condition after the contents of the I2CDAO register are
transmitted.