Datasheet

MCU Memory Map
17
SLLS519H—January 2010 TUSB3410, TUSB3410I
Table 4−3. Memory-Mapped Registers Summary (XDATA Range = FF80h → FFFFh) (Continued)
ADDRESS REGISTER DESCRIPTION
FF9Dh−FF94h
FF93h
Reserved
WDCSR
Watchdog timer control and status register
FF92h VECINT Vector interrupt register
FF91h Reserved
FF90h ROMS ROM shadow configuration register
FF8Fh−FF84h Reserved
FF83h OEPBCNT_0 Output endpoint_0: Byte count register
FF82h OEPCNFG_0 Output endpoint_0: Configuration register
FF81h IEPBCNT_0 Input endpoint_0: Byte count register
FF80h IEPCNFG_0 Input endpoint_0: Configuration register
Table 4−4. EDB Memory Locations
ADDRESS REGISTER DESCRIPTION
FF7Fh−FF60h Reserved
FF5Fh IEPSIZXY_3 Input endpoint_3: X-Y buffer size
FF5Eh IEPBCTY_3 Input endpoint_3: Y-byte count
FF5Dh IEPBBAY_3 Input endpoint_3: Y-buffer base address
FF5Ch − Reserved
FF5Bh − Reserved
FF5Ah IEPBCTX_3 Input endpoint_3: X-byte count
FF59h IEPBBAX Input endpoint_3: X-buffer base address
FF58h IEPCNF_3 Input endpoint_3: Configuration
FF57h IEPSIZXY_2 Input endpoint_2: X-Y buffer size
FF56h IEPBCTY_2 Input endpoint_2: Y-byte count
FF55h IEPBBAY_2 Input endpoint_2: Y-buffer base address
FF54h − Reserved
FF53h − Reserved
FF52h IEPBCTX_2 Input endpoint_2: X-byte count
FF51h IEPBBAX_2 Input endpoint_2: X-buffer base address
FF50h IEPCNF_2 Input endpoint_2: Configuration
FF4Fh IEPSIZXY_1 Input endpoint_1: X-Y buffer size
FF4Eh IEPBCTY_1 Input endpoint_1: Y-byte count
FF4Dh IEPBBAY_1 Input endpoint_1: Y-buffer base address
FF4Ch − Reserved
FF4Bh − Reserved
FF4Ah IEPBCTX_1 Input endpoint_1: X-byte count
FF49h IEPBBAX_1 Input endpoint_1: X-buffer base address
FF48h IEPCNF_1 Input endpoint_1: Configuration
FF47h
↑ Reserved
FF20h
FF1Fh OEPSIZXY_3 Output endpoint_3: X-Y buffer size
FF1Eh OEPBCTY_3 Output endpoint_3: Y-byte count
FF1Dh OEPBBAY_3 Output endpoint_3: Y-buffer base address
FF1Bh−FF1Ch − Reserved