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2.10 I
2
C Registers
2.10.1 I2CSTA: I
2
C Status and Control Register
TUSB3210
Universal Serial Bus
General-Purpose Device Controller
SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007
The TUSB3210 only supports a master-slave relationship; therefore, it does not support bus arbitration.
This register is used to control the stop condition for read and write operations. In addition, it provides
transmitter and receiver handshake signals with their respective interrupt enable bits.
7 6 5 4 3 2 1 0
RXF RIE ERR 1/4 TXE TIE SRD SWR
R/C R/W R/C R/W R/C R/W R/W R/W
BIT NAME RESET FUNCTION
0 SWR 0 Stop write condition. This bit defines whether the I
2
C controller generates a stop condition when data from
the I2CDAO register is transmitted to an external device.
SWR = 0 Stop condition is not generated when data from the I2CDAO register is shifted out to an
external device.
SWR = 1 Stop condition is generated when data from the I2CDAO register is shifted out to an external
device.
1 SRD 0 Stop read condition. This bit defines whether the I
2
C controller generates a stop condition when data is
received and loaded into I2CDAI register.
SRD = 0 Stop condition is not generated when data from SDA line is shifted into the I2CDAI register.
SRD = 1 Stop condition is generated when data from SDA line is shifted into the I2CDAI register.
2 TIE 0 I
2
C transmitter empty interrupt enable
TIE = 0 Interrupt disabled
TIE = 1 Interrupt enabled
3 TXE 1 I
2
C transmitter empty. This bit indicates that data can be written to the transmitter. It can be used for
polling or it can generate an interrupt.
TXE = 0 Transmitter is full. This bit is cleared when the MCU writes a byte to the I2CDAO register.
TXE = 1 Transmitter is empty. The I
2
C controller sets this bit when the content of the I2CDAO register is
copied to the SDA shift register.
4 1/4 0 Bus speed selection
1/4 = 0 100-kHz bus speed
1/4 = 1 400-kHz bus speed
5 ERR 0 Bus error condition. This bit is set by the hardware when the device does not respond. It is cleared by the
MCU.
ERR = 0 No bus error
ERR = 1 Bus error condition has been detected. Clears when the MCU writes a 1. Writing a 0 has no
effect.
6 RIE 0 I
2
C receiver ready interrupt enable
RIE = 0 Interrupt disabled
RIE = 1 Interrupt enabled
7 RXF 0 I
2
C receiver full. This bit indicates that the receiver contains new data. It can be used for polling or it can
generate an interrupt.
RXF = 0 Receiver is empty. This bit is cleared when the MCU reads the I2CDAI register.
RXF = 1 Receiver contains new data. This bit is set by the I
2
C controller when the received serial data
has been loaded into the I2CDAI register.
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