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2.4.8 IEPBBAX_n: Input Endpoint X-Buffer Base Address (n = 1 to 3)
2.4.9 IEPBCTX_n: Input Endpoint X-Byte Base Address (n = 1 to 3)
TUSB3210
Universal Serial Bus
General-Purpose Device Controller
SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007
BIT NAME RESET FUNCTION
6 ISO x ISO = 0 Non-isochronous transfer. This bit must be cleared by the MCU because only
non-isochronous transfer is supported.
7 UBME x UBM enable/disable bit. Set/cleared by the MCU.
UBME = 0 UBM cannot use this endpoint.
UBME = 1 UBM can use this endpoint.
7 6 5 4 3 2 1 0
A10 A9 A8 A7 A6 A5 A4 A3
R/W R/W R/W R/W R/W R/W R/W R/W
BIT NAME RESET FUNCTION
7–0 A[10:3] x A[10:3] of X-buffer base address (padded with 3 LSB of zeros for a total of 11 bits). This value is set by
the MCU. UBM or DMA uses this value as the start address of a given transaction. Furthermore, UBM or
DMA does not change this value at the end of a transaction.
7 6 5 4 3 2 1 0
NAK C6 C5 C4 C3 C2 C1 C0
R/W R/W R/W R/W R/W R/W R/W R/W
BIT NAME RESET FUNCTION
6–0 C[6:0] x X-Buffer Byte count:
000 0000b → Count = 0
000 0001b → Count = 1 byte
.
.
.
011 1111b → Count = 63 bytes
100 0000b → Count = 64 bytes
Any value ≥ 100 0001b produces unpredictable results.
7 NAK x NAK = 0 Buffer contains a valid packet for host-in transaction
NAK = 1 Buffer is empty (host-in request is NAK)
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