Datasheet

2−1

2 Functional Description

2.1 MCU Memory Map

Figure 2−1 illustrates the MCU memory map under boot and normal operation. It must be noted that the internal 256

bytes of IDATA are not shown since it is assumed to be in the standard 8052 location (0000 to 00FF). The shaded

areas represent the internal ROM/RAM. For more information regarding the integrated 8052, see the TUSBxxxx

Microcontroller Reference Guide (SLLU044).

When the SDW bit = 0 (boot mode): The 6K ROM is mapped to address (0000−17FF) and is duplicated in location

(8000−97FF) in code space. The internal 8K RAM is mapped to address range (0000−1FFF) in data space. Buffers,

memory-mapped registers (MMRs), and I/O are mapped to address range (FD80−FFFF) in data space.

When the SDW bit = 1 (normal mode): The 6K ROM is mapped to (8000−97FF) in code space. The internal 8K RAM

is mapped to address range (0000−1FFF) code space. Buffers, MMR, and I/O are mapped to address range

(FD80−FFFF) in data space.

0000

Boot Mode (SDW = 0)

CODE

6K Boot ROM

17FF

1FFF

6K Boot ROM

97FF

8000

FD80

FFFF

FF80

RAM

Read/Write

XDATA

MMR

512 Bytes

RAM

Code RAM

Read Only

CODE

Normal Mode (SDW = 1)

6K Boot ROM

XDATA

MMR

512 Bytes

RAM

Figure 2−1. MCU Memory Map (TUSB2136B)

2.2 Miscellaneous Registers

2.2.1 TUSB2136 Boot Operation

Because the code space is in RAM (with the exception of the boot ROM), the TUSB2136 firmware must be loaded

from an external source. Two options for booting are available: an external serial EEPROM source connected to the