Datasheet
TUSB2077A
SLLS414E –MARCH 2000–REVISED SEPTEMBER 2013
www.ti.com
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Reel of 250 TUSB2077APT
0°C to 70°C LQFP – PT TUSB2077APTR TUSB2077A
Reel of 1000
TUSB2077APTRG4
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
DESCRIPTION
The TUSB2077A hub is a 3.3-V CMOS device that provides up to seven downstream ports in compliance with
the USB 2.0 specification. Because this device is implemented with a digital state machine instead of a
microcontroller, no software programming is required. Fully-compliant USB transceivers are integrated into the
ASIC for all upstream and downstream ports. The downstream ports support both full-speed and low-speed
devices by automatically setting the slew rate according to the speed of the device attached to the ports. The
configuration of the BUSPWR terminal selects either the bus-powered or self-powered mode. The introduction of
the DP0 pullup resistor disable terminal, DP0PUR, makes it much easier to implement an onboard bus/self-
power dynamic-switching circuitry. The three LED indicator control output terminals also enable the
implementation of visualized status monitoring of the hub and its downstream ports. With these new function
terminals, the end equipment vendor can considerably reduce the total board cost while adding additional
product value.
The EXTMEM (terminal 47) enables or disables the optional EEPROM interface. When EXTMEM is high, the
vendor and product IDs (VID and PID) use defaults, such that the message displayed during enumeration is
General Purpose USB Hub. For this configuration, terminal 8 functions as the GANGED input terminal and
EECLK (terminal 7) is unused. If custom VID and PID descriptors are desired, the EXTMEM must be tied low
(EXTMEM = 0) and a SGS Thompson M93C46 EEPROM, or equivalent, stores the programmable VID, PID, and
GANGED values. For this configuration, terminals 7 and 8 function as the EEPROM interface signals with
terminal 7 as EECLK and terminal 8 as EEDATA, respectively.
The TUSB2077A supports both bus-powered and self-powered modes. External power-management devices,
such as the TPS2044, are required to control the 5-V power source switching (on/off) to the downstream ports
and to detect an overcurrent condition from the downstream ports individually or ganged. Outputs from external
power devices provide overcurrent inputs to the TUSB2077A OVRCUR terminals in case of an overcurrent
condition, the corresponding PWRON terminals are disabled by the TUSB2077A. In the ganged mode, all
PWRON signals transition simultaneously, and any OVRCUR input can be used. In the nonganged mode, the
PWROR outputs and OVRCUR inputs operate on a per-port basis.
The TUSB2077A provides the flexibility of using either a 6-MHz or a 48-MHz clock. The logic level of the MODE
terminal controls the selection of the clock source. When MODE is low, the output of the internal APLL circuitry is
selected to drive the internal core of the chip. When MODE is high, the XTAL1 input is selected as the input
clock source and the APLL circuitry is powered down and bypassed. The internal oscillator cell is also powered
down while MODE is high. For 6-MHz operation, TUSB2077A requires a 6-MHz clock signal on XTAL1 terminal
(with XTAL2 for a crystal) from which its internal APLL circuitry generates a 48-MHz internal clock to sample the
data from the upstream port. For 48-MHz operation, the clock cannot be generated with a crystal, using the
XTAL2 output, since the internal oscillator cell only supports the fundamental frequency. If low-power suspend
and resume are desired, a passive crystal or resonator must be used, although the hub supports the flexibility of
using any device that generates a 6-MHz clock. Because most oscillators cannot be stopped while power is on,
their use prohibits low-power suspend, which depends on disabling the clock. When the oscillator is used, by
connecting its output to the XTAL1 terminal and leaving the XTAL2 terminal open, its TTL output level can not
exceed 3.6 V. If a 6-MHz oscillator is used, it must be stopped at logic low whenever SUSPND is high. For
crystal or resonator implementations, the XTAL1 terminal is the input and the XTAL2 terminal is used as the
feedback path. A sample crystal tuning circuit is shown in Figure 7.
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