Datasheet

XTAL1
C1 C2
C
L
XTAL2
1 k
DP0
DM0
EEDATA
TUSB2036 USB Hub
(3-Port Configuration)
System
Power-On Reset
Regulator
Power
Switching
OVRCUR1 -
OVRCUR3
PWRON1 -
PWRON3
EECLK
RESET
XTAL1/CLK48
EXTMEM
V
CC
GND
DP1 - DP3
DM1 - DM4
GND
V
bus
5 V GND
XTAL2
USB Data lines
and Power to
Downstream
Ports
Bus or Local Power
6-MHz Clock
Signal
4
4
4
4
30
29
4
1
2
6
5
3, 25
7, 28
12, 16, 20
10, 14, 18
11, 15, 19
9, 13, 17
5
8
6
2
4
3
ORG
V
CC
V
SS
D
Q
C
S
1
EEPROM
3.3 V
26
OCPROT/
PWRSW
21
NP3
24
22
23
NPINT1
NPINT0
MODE
TUSB2036
www.ti.com
SLLS372F MARCH 2000REVISED SEPTEMBER 2013
USB Design Notes
The following sections provide block diagram examples of how to implement the TUSB2036 device. Note, even
though no resistors are shown, pullup, pulldown, and series resistors must be used to properly implement this
device.
Figure 6 is a block diagram example of how to connect the external EEPROM if a custom product ID and vendor
ID are desired.
Figure 7 is an example of how to generate the 6-MHz clock signal.
Figure 8 shows the EEPROM read operation timing diagram.
Figure 9, Figure 10, Figure 11, and Figure 12 illustrate how to connect the TUSB2036 device for different power
source and port power-management combinations.
Figure 6. Typical Application of the TUSB2036 USB Hub
NOTE: This figure assumes a 6-MHz fundamental crystal that is parallel loaded. The component values of C1, C2, and R
d
are determined using a crystal from Fox Electronics part number HC49U-6.00MHz 30\50\0±70\20, which means
±30 ppm at 25°C and ±50 ppm from 0°C to 70°C. The characteristics for the crystal include a load capacitance (C
L
) of
20 pF, maximum shunt capacitance (C
o
) of 7 pF, and the maximum ESR of 50 . In order to insure enough negative
resistance, use C1 = C2 = 27 pF. The resistor R
d
is used to trim the gain, and R
d
= 1.5 k is recommended.
Figure 7. Crystal Tuning Circuit
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Product Folder Links: TUSB2036