Datasheet

R1EXT
R1EXTRTN
10K ± 1%W
SSRXP
VBUS
SSRXN
SSTXP SSTXN
DP
DM
USB Connector
XI
VSSOSC
XO
Crystal
Connection
ULPIPIPE RX
PIPE TX
Link Controller
JTAGJTAG
10K ± 1%W
90.9K ± 1 %W
TUSB1310A
www.ti.com SLLSE32E –NOVEMBER 2010–REVISED JULY 2012
5 DESIGN GUIDELINES
5.1 Chip Connection on PCB
Components should be placed close to the TUSB1310A to reduce the trace length of the interface
between the components and the TUSB1310A. If external capacitors can not accommodate a close
placement, shielding to ground is recommended.
Figure 5-1. Analog Pin Connections
5.1.1 USB Connector Pins Connection
Differential pair signals, DP/DM, SSTXP/SSTXN, SSRXP/SSRXN, should be kept as short as possible.
The differential pair traces should be trace-length matched and parallelism should be maintained. They
also need to minimize vias and corners and should avoid crossing plane splits and stubs.
Figure 5-2 and Figure 5-3 are for visual reference only.
Copyright © 2010–2012, Texas Instruments Incorporated DESIGN GUIDELINES 27
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Product Folder Link(s): TUSB1310A