Datasheet

TUSB1211
SLLSE80A –MARCH 2011– REVISED JANUARY 2012 www.ti.com
Table 2-1. Terminal Functions
# PIN
(1)
NAME A/D
(2)
TYPE
(3)
LEVEL
(4)
DESCRIPTION
1 D5 NXT D O V
DDIO
ULPI NXT output signal
2 B1 DATA0 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
3 A1 DATA1 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
4 A2 DATA2 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
5 A3 DATA3 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
6 A5 DATA4 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
7 A6 DATA5 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
8 B6 DATA6 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
Active-high chip select pin. When low the IC is in power down and ULPI bus is tri-stated. When high (and
9 B3 CS D I VDDIO
CS_N pin iTie to VDDIO if unused.s low) normal operation.
10 E6 REG1V5 A POWER V
DD15
1.5 V internal LDO output. Connect to external filtering capacitor.
11 C6 DATA7 D I/O V
DDIO
ULPI DATA input/output signal synchronized to CLOCK
REFCLK clock frequency configuration pin. Two frequencies are supported: 19.2MHz when 0, or 26MHz when
12 B4 CFG D I V
DDIO
1.
13 D1 DP A I/O V
DD33
DP pin of the USB connector
14 C1 DM A I/O V
DD33
DM pin of the USB connector
15 E3 REG3V3 A POWER V
DD33
3.3 V internal LDO output. Connect to external filtering capacitor.
16 F3 VBAT A POWER V
BAT
Input supply voltage or battery source. Nominally 3.3 V to 4.5 V
17 F4 VBUS A I/O V
BUS
VBUS pin of the USB connector
18 D3 ID A I/O V
BUS
Identification (ID) pin of the USB connector
ULPI 60MHz clock on which ULPI data is synchronized. 2 modes are possible:
19 A4 CLOCK D I/O V
DDIO
Input Mode: CLOCK defaults as an input (this is the default clock mode)
Output Mode: When an input clock is detected on REFCLK pin then CLOCK will change to an output
Active low chip reset pin. Minimum pulse width 100 µs. When low all digital logic (except 32kHz logic required
for power-up sequencing and charger detection state-machine) including registers are reset to their default
20 C4 RESET_N D I V
DDIO
values. ULPI bus is in “ULPI Synchronous mode power-up PLL OFF” state as described in Table14-1. When
high normal USB operation.
21 D6 STP D I V
DDIO
ULPI STP input signal
22 E5 DIR D O V
DDIO
ULPI DIR output signal
23 B5 VDDIO A I V
DDIO
External 1.8V supply input for digital I/Os. Connect to external filtering capacitor.
24 B2 VDDIO A I V
DDIO
External 1.8V supply input for digital I/Os. Connect to external filtering capacitor.
25 C5 GND A GROUND GND Ground
26 D2 GND A GROUND GND Ground
27 E4 GND A GROUND GND Ground
Reference clock input.
28 F5 REFCLK A I V
DDIO
Input reference clock frequency must be indicated by CFG pin.
Two frequencies are supported: 19.2MHz (when CFG = 0), and 26MHz (when CFG = 1).
HS USB SOF (Start-Of-Frame) output clock. (feature controlled by SOF_EN bit, disabled and output logic low
29 F6 SOF D O V
DDIO
by default.). HS USB SOF packet rate is 8 kHz
30 C2 NC Not connected
Active-low chip select pin. When high the IC is in power down and ULPI bus is tri-stated. When low (and CS pin
31 C3 CS_N D I V
DDIO
is high) normal operation. Tie to GND if unused.
Active low input pin used to enable Battery Charging Detection in Dead Battery Charger Detection mode. This
32 E1 CHRG_EN_N D I V
BAT
pin is ignored in ACTIVE mode. Connect to GND to activate. Connect to VBAT when charger detection not
required
VBUS fault detector input used as EXTERNALVBUSINDICATOR in TUSB1211. The link must enable VBUS
fault detection via the USEEXTERNALVBUSINDICATOR register bit, and the polarity must be set via the
33 E2 FAULT D I V
BAT
INDICATORCOMPLEMENT register bit. INDICATORPASSTHRU bit can be used to qualify FAULT with the
internal vbusvalid comparator. Connect to GND if not used. This pin is 5V tolerant.
When connected to GND then CHRG_DET output pin is active low. When connected to VBAT then
34 F1 CHRG_POL D I V
BAT
CHRG_DET output pin is active high.
(1) Pin = Package Pin coordinate of Figure 2-1
(2) A/D: A = Analog pin, D = Digital pin
(3) TYPE: I = Input pin type, O = Output pin type, I/O = Input/Output pin type, POWER = Power supply pin type,
GROUND = Ground type pin
(4) LEVEL = Pin power supply level
8 Terminal Description Copyright © 2011–2012, Texas Instruments Incorporated
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