TUSB1211 Standalone USB Transceiver Chip Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com Contents 1 2 3 4 5 6 7 8 9 10 2 ............................................................................................................................. 5 1.1 Description ................................................................................................................... 6 Terminal Description ........................................................................................................... 7 2.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com List of Figures 2-1 TFBGA36 Package - Bottom View .............................................................................................. 7 4-1 USB-OTG with ULPI Output Clock ............................................................................................. 11 8-1 USB UART Data Flow ...........................................................................................................
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com List of Tables 2-1 Terminal Functions ................................................................................................................ 8 5-1 Electrical Characteristics: CLOCK Input....................................................................................... 12 5-2 Electrical Characteristics: REFCLK ............................................................................................
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com Standalone USB Transceiver Chip Check for Samples: TUSB1211 1 Features 1 • USB2.0 PHY Transceiver Chip, Designed to Interface With a USB Controller via a ULPI Interface, Fully Compliant With: – Universal Serial Bus Specification Rev. 2.0 – On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3 – UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1 – ULPI 12-Pin SDR Interface – USB Battery Charging Specification Rev. 1.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 1.1 www.ti.com Description The TUSB1211 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed 1.5Mbps), and is compliant to both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI serial modes. TUSB1211 also supports USB Battery Charging Specification Ver1.1.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com 2 Terminal Description TFBGA36 PACKAGE (BOTTOM VIEW) (1) (2) F CHRG_ POL CHRG_ DET VBAT VBUS REFCLK SOF E CHRG_ EN_N FAULT REG3V3 GND DIR REG1V5 D DP GND ID PSW NXT STP C DM NC CS_N RESET_N GND DATA7 B DATA0 VDDIO CS CFG VDDIO DATA6 A DATA1 DATA2 DATA3 CLOCK DATA4 DATA5 (1) 5 3 6 1 4 2 NC = Not Connected The size of the device should be 3.5 mm ±0.1 mm by 3.5 mm ±0.1 mm. Height is 1.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com Table 2-1.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com Table 2-1. Terminal Functions (continued) # PIN (1) NAME A/D (2) TYPE (3) LEVEL (4) DESCRIPTION 35 F2 CHRG_DET D O VBAT When CHRG_POL pin is at GND then CHRG_DET is in active low open-drain mode with external RCHRGDET (100K) connected to VBAT. When CHRG_POL pin is at VBAT then CHRG_DET is in active high open-source mode with external RCHRGDET (100K) connected to GND. This pin is 5V tolerant.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 3 Electrical Characteristics 3.1 Absolute Maximum Ratings www.ti.com over operating free-air temperature range (unless otherwise noted) (1) PARAMETER VBAT VDDIO CONDITIONS Main battery supply voltage Continuous Main battery supply voltage pulsed The product will have negligible reliability impact for pulsed voltage spikes of 5.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 5 Clock System 5.1 USB PLL Reference Clock www.ti.com The USB PLL block generates the clocks used to synchronize: • the ULPI interface (60 MHz clock) • the USB interface (depending on the USB data rate, 480 Mbps, 12 Mbps or 1.5 Mbps) TUSB1211 requires an external reference clock which is used as an input to the 480MHz USB PLL block. Depending on the clock configuration, this reference clock can be provided either at REFCLK pin or at CLOCK pin.
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TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 6 www.ti.com Power Management This chapter describes the electrical characteristics of the voltage regulators and timing characteristics of the supplies digitally controlled within the TUSB1211. 6.1 Power Provider Table 6-1. Summary of Internal Power Providers (1) (1) 6.2 SUPPLY NAME PIN NAME TYPE TYPICAL VOLTAGE (V) REG1V5 REG1V5 LDO 1.5 REG1V8 - LDO 1.8 REG3V3 REG3V3 LDO 3.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com • register map in ULPI specification Rev1.1. This is the case because OTG_CONTROL register bits DRVVBUS and DRVVBUSEXTERNAL bits are 0 by default, and DPPULLDOWN, DMPULLDOWN bits are 1 by default such that the 15 kΩ pulldown resistors at DP/DM pins are enabled by default. It is the responsibility of the link to enable external VBUS supply if required in Host mode, or to reconfigure the PHY if required in Device mode.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 7 www.ti.com USB Transceiver (PHY) The TUSB1211 device includes a universal serial bus (USB) on-the-go (OTG) transceiver that supports USB 480 Mb/s high-speed (HS), 12 Mb/s full-speed (FS), and USB 1.5 Mb/s low-speed (LS) through a 12-pin UTMI+ low pin interface (ULPI). NOTE LS device mode is not allowed by a USB2.0 HS capable PHY, therefore it is not supported by TUSB1211. This is clearly stated in USB2.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com 8 UART Transceiver By setting CARKITMODE bit in IFC_CTRL register TUSB1211 will enter UART mode. In this mode, the ULPI data bus is redefined as a 2-pin UART interface, which exchanges data through a direct access to the FS/LS analog transmitter at DM pin and receiver at DP pin. Figure 8-1.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 9 www.ti.
TUSB1211 SLLSE80A – MARCH 2011 – REVISED JANUARY 2012 www.ti.com 10 USB Battery Charger Detection and ACA Feature In order to support Battery Charging Specification v1.1 April 2009 [BCS v1.1], a charger detection module is included inside TUSB1211 module.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TUSB1211A1ZRQR Package Package Pins Type Drawing BGA MI CROSTA R JUNI OR ZRQ 36 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1500 330.0 12.4 Pack Materials-Page 1 3.7 B0 (mm) K0 (mm) P1 (mm) 3.7 1.4 8.0 W Pin1 (mm) Quadrant 12.
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TUSB1211A1ZRQR BGA MICROSTAR JUNIOR ZRQ 36 1500 336.6 336.6 31.
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