Datasheet

TUSB1210
SLLSE09F –NOVEMBER 2009–REVISED AUGUST 2012 www.ti.com
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND Current value of UTMI+ IdGnd output. R 0
This bit is not updated if IdPullup bit is reset to 0 and for 50 ms after IdPullup is set to
1.
3 SESSEND Current value of UTMI+ SessEnd output. R 0
2 SESSVALID Current value of UTMI+ SessValid output. SessValid is the same as UTMI+ AValid. R 0
1 VBUSVALID Current value of UTMI+ VbusValid output. R 0
0 HOSTDISCONNECT Current value of UTMI+ Hostdisconnect output. R 0
Applicable only in host mode.
Automatically reset to 0 when Low Power Mode is entered.
NOTE: Reset value is '0' when host is connected.
Reset value is '1' when host is disconnected.
9.1.21 USB_INT_LATCH
ADDRESS OFFSET 0x14
PHYSICAL ADDRESS 0x14 INSTANC USB_SCUSB
E
DESCRIPTION These bits are set by the PHY when an unmasked change occurs on the
corresponding internal signal. The PHY will automatically clear all bits when
the Link reads this register, or when Low Power Mode is entered. The PHY
also clears this register when Serial Mode or Carkit Mode is entered regardless
of the value of ClockSuspendM.
The PHY follows the rules defined in Table 26 of the ULPI spec for setting any
latch register bit. It is important to note that if register read data is returned to
the Link in the same cycle that a USB Interrupt Latch bit is to be set, the
interrupt condition is given immediately in the register read data and the Latch
bit is not set.
Note that it is optional for the Link to read the USB Interrupt Latch register in
Synchronous Mode because the RX CMD byte already indicates the interrupt
source directly
TYPE R
WRITE LATENCY
7 6 5 4 3 2 1 0
Reserved Reserved Reserved
IDGND_LATCH
SESSEND_LATCH
SESSVALID_LATCH
VBUSVALID_LATCH
HOSTDISCONNECT_LATCH
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND_LATCH Set to 1 by the PHY when an unmasked event occurs on IdGnd. Cleared R 0
when this register is read.
42 Register Map Copyright © 2009–2012, Texas Instruments Incorporated
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