Datasheet

TUSB1210
www.ti.com SLLSE09F –NOVEMBER 2009–REVISED AUGUST 2012
7 6 5 4 3 2 1 0
Reserved Reserved Reserved
IDGND_RISE
SESSEN D_RISE
SESSVALID_RISE
VBUSVALID_RISE
HOSTDISCONNECT_RISE
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND_RISE RW 1
3 SESSEND_RISE RW 1
2 SESSVALID_RISE RW 1
1 VBUSVALID_RISE RW 1
0 HOSTDISCONNECT_RISE RW 1
9.1.17 USB_INT_EN_FALL
ADDRESS OFFSET 0x10
PHYSICAL ADDRESS 0x10 INSTANCE USB_SCUSB
DESCRIPTION If set, the bits in this register cause an interrupt event notification to be
generated when the corresponding PHY signal changes from low to high. By
default, all transitions are enabled.
TYPE RW
WRITE LATENCY
7 6 5 4 3 2 1 0
Reserved Reserved Reserved
IDGND_FALL
SESSEND_FALL
SESSVALID_FALL
VBUSVALID_FALL
HOSTDISCONNECT_FALL
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND_FALL Generate an interrupt event notification when IdGnd changes RW 1
from high to low.
Event is automatically masked if IdPullup bit is clear to 0 and for
50ms after IdPullup is set to 1.
3 SESSEND_FALL Generate an interrupt event notification when SessEnd changes RW 1
from high to low.
2 SESSVALID_FALL Generate an interrupt event notification when SessValid changes RW 1
from high to low. SessValid is the same as UTMI+ AValid.
1 VBUSVALID_FALL Generate an interrupt event notification when VbusValid changes RW 1
from high to low.
Copyright © 2009–2012, Texas Instruments Incorporated Register Map 39
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