Datasheet

TUSB1210
SLLSE09F –NOVEMBER 2009–REVISED AUGUST 2012 www.ti.com
BITS FIELD NAME DESCRIPTION TYPE RESET
2 SESSVALID_RISE Generate an interrupt event notification when SessValid changes RW 1
from low to high. SessValid is the same as UTMI+ AValid.
1 VBUSVALID_RISE Generate an interrupt event notification when VbusValid changes RW 1
from low to high.
0 HOSTDISCONNECT_RISE Generate an interrupt event notification when Hostdisconnect RW 1
changes from low to high. Applicable only in host mode
(DpPulldown and DmPulldown both set to 1b).
9.1.15 USB_INT_EN_RISE_SET
ADDRESS OFFSET 0x0E
PHYSICAL ADDRESS 0x0E INSTANCE USB_SCUSB
DESCRIPTION This register doesn't physically exist.
It is the same as the usb_int_en_rise register with read/set-only property (write
'1' to set a particular bit, a write '0' has no-action).
TYPE RW
WRITE LATENCY
7 6 5 4 3 2 1 0
Reserved Reserved Reserved
IDGND_RISE
SESSEND_RISE
SESSVALID_RISE
VBUSVALID_RISE
HOSTDISCONNECT_RISE
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND_RISE RW 1
3 SESSEND_RISE RW 1
2 SESSVALID_RISE RW 1
1 VBUSVALID_RISE RW 1
0 HOSTDISCONNECT_RIS RW 1
E
9.1.16 USB_INT_EN_RISE_CLR
ADDRESS OFFSET 0x0F
PHYSICAL ADDRESS 0x0F INSTANCE USB_SCUSB
DESCRIPTION This register doesn't physically exist.
It is the same as the usb_int_en_rise register with read/clear-only property
(write '1' to clear a particular bit, a write '0' has no-action).
TYPE RW
WRITE LATENCY
38 Register Map Copyright © 2009–2012, Texas Instruments Incorporated
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