Datasheet

TUSB1210
www.ti.com
SLLSE09F NOVEMBER 2009REVISED AUGUST 2012
7 6 5 4 3 2 1 0
DRVVBUS
IDPULLUP
CHRGVBUS
DPPULLDOWN
DMPULLDOWN
DISCHRGVBUS
DRVVBUSEXTERNAL
USEEXTERNALVBUSINDICATOR
BITS FIELD NAME DESCRIPTION TYPE RESET
7 USEEXTERNALVBUSINDICATOR RW 0
6 DRVVBUSEXTERNAL RW 0
5 DRVVBUS RW 0
4 CHRGVBUS RW 0
3 DISCHRGVBUS RW 0
2 DMPULLDOWN RW 1
1 DPPULLDOWN RW 1
0 IDPULLUP RW 0
9.1.14 USB_INT_EN_RISE
ADDRESS OFFSET 0x0D
PHYSICAL ADDRESS 0x0D INSTANCE USB_SCUSB
DESCRIPTION If set, the bits in this register cause an interrupt event notification to be
generated when the corresponding PHY signal changes from low to high. By
default, all transitions are enabled.
TYPE RW
WRITE LATENCY
7 6 5 4 3 2 1 0
Reserved
Reserved
Reserved
IDGND_RISE
SESSEND_RISE
SESSVALID_RISE
VBUSVALID_RISE
HOSTDISCONNECT_RISE
BITS FIELD NAME DESCRIPTION TYPE RESET
7 Reserved R 0
6 Reserved R 0
5 Reserved R 0
4 IDGND_RISE Generate an interrupt event notification when IdGnd changes from RW 1
low to high.
Event is automatically masked if IdPullup bit is clear to 0 and for
50ms after IdPullup is set to 1.
3 SESSEND_RISE Generate an interrupt event notification when SessEnd changes RW 1
from low to high.
Copyright © 2009–2012, Texas Instruments Incorporated Register Map 37
Submit Documentation Feedback
Product Folder Links: TUSB1210