Datasheet

MGS963
10%
90%
90%
10%
V
OL
V
OH
t
FR
,t
LR
t
FF
,t
LF
MGS966
Logic Input
Differential
Data Lines
1.8 V
0 V
V
OH
V
OL
0.9 V
0.9 V
V
OL
+ 0.3 V
V
OH
− 0.3 V
V
CRS
t
PZH
t
PZL
t
PHZ
t
PLZ
MGS9 64
V
OL
Logic Output
V
OH
Differential
Data Lines
0.9 V
V
CRS
V
CRS
1.8 V
0 V
t
PLH(drv)
t
PHL(drv)
0.9 V
MGS965
V
OL
Logic Output
V
OH
0.8 V
Differential
Data Lines
2.0 V
V
CRS
0.9 V
0.9 V
V
CRS
t
PLH(rcv)
t
PLH(se)
t
PHL(rcv)
t
PHL(se)
TUSB1105, TUSB1106
SCAS818E –MAY 2006–REVISED SEPTEMBER 2010 www.ti.com
Dynamic Electrical Characteristics for Analog I/O Pins (D+, D–)
(1)
Receiver Timing, Full-Speed and Low-Speed Mode, Differential Receiver
over recommended ranges of operating free-air temperature and supply voltage, V
CC
= 4 V to 5.5 V or V
reg(3.3)
= 3 V to 3.6 V,
V
CC(I/O)
= 1.65 V to 3.6 V, V
GND
= 0 V, see Table 10 for valid voltage level combinations, T
A
= –40°C to 85°C
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
PLH(rcv)
LOW to HIGH (see Figure 3) 15
Propagation delay (D+, D– to RCV) ns
t
PHL(rcv)
HIGH to LOW (see Figure 3) 15
(1) Test circuit, see Figure 13
Dynamic Electrical Characteristics for Analog I/O Pins (D+, D–)
(1)
Receiver Timing, Full-Speed and Low-Speed Mode, Single-Ended Receiver
over recommended ranges of operating free-air temperature and supply voltage, V
CC
= 4 V to 5.5 V or V
reg(3.3)
= 3 V to 3.6 V,
V
CC(I/O)
= 1.65 V to 3.6 V, V
GND
= 0 V, see Table 10 for valid voltage level combinations, T
A
= –40°C to 85°C
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
PLH(se)
LOW to HIGH (see Figure 3) 18
Propagation delay (D+, D– to VP, VM) ns
t
PHL(se)
HIGH to LOW (see Figure 3) 18
(1) Test circuit, see Figure 13
Figure 1. Rise and Fall Times Figure 2. OE to D+, D–
Figure 3. D+, D– to RCV, VP, VM Figure 4. VO/VPO, FSE0/VMO to D+, D–
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