Datasheet

6 TSW3070EVM Introduction
6.1 Jumper Settings
6.2 Input/Output Connectors
www.ti.com TSW3070EVM Introduction
Table 3. Software Feature Descriptions (continued)
Control Name Input/Output Description
Status Output Status of the TSW3100 transaction.
Bytes loaded Output Displays the number of bytes loaded to the TSW3100.
The TSW3070EVM was designed to provide a robust yet flexible evaluation system for the DAC5682Z as
used in an arbitrary waveform generation system. The EVM includes, in addition to the DAC5682Z, a
CDCM7005 for clock distribution, an OPA695, and THS3091/5 active output interface designed to drive
into a 50- Ω termination. For a complete hardware description, consult the schematics and layout
documents included on the provided CD.
The TSW3070EVM has onboard jumpers that allow you to modify the board configuration. Table 4
explains the functionality of the jumpers.
Table 4. Jumper List
Jumper Label Function Condition Default
JP8 EXTLO Internal (GND) or external (3.3V) voltage reference GND Pin 2-3
JP10 VFUSE Factory use only. Connect to 1.8VDD for normal operation. 1.8 VDD Pin 1-2
JP11 THS PD Low-active power down of THS3091/5 +Vamp Pin 1-2
JP12 CDC_PD Low-active power down of CDCM7005 3.3 VCLK Pin 1-2
JP13 VCXOB Choose internal VCXO or external VCXO INB Internal VCXO Pin 1-2
JP14 VCXO_P Choose internal VCXO or external VCXO positive input Internal VCXO Pin 1-2
JP15 VCXO_N Choose CDCM7005 or external VBB CDCM7005 Pin 1-2
JP16 REF_CLK Choose internal 10-MHz ref or external ref Internal Ref Pin 2-3
JP19 +3.3VCLK VCXO power supply VCXO on Pin 1-2
Table 5 lists the input and output connectors.
Table 5. Input and Output Connections
Reference Label Connector Description
Designator Type
J1 IOUTB2 SMA DACB transformer output. Optional IOUTB2 output.
J3 IOUTA2 SMA DACA transformer output. Optional IOUTA2 output.
J5 SAMTEC Input LVDS data to DAC682z. Output clock to data source.
J6 EXT_VCXO_P SMA External main clock input.
J7 EXT_VCXO_N SMA External VCXO negative connection. Not required.
J8 Y2A_CLK SMA Optional CDCM7005 clock output.
J9 EXT_REF_C SMA External reference clock input.
J10 Y2B_CLK SMA Optional CDCM7005 clock output.
J13 USB_CONN USB USB connector for software communication.
J12/J25 6V input & Return Banana Plug 6V input voltage pair
J16 THS3091/5 OUT SMA Output of the THS3091/5 amplifier
J11 OPA695 OUT SMA Output of the OPA695 amplifier
SLWU055 – May 2008 TSW3070EVM: Amplifier Interface to Current Sink DAC - Arbitrary Waveform Generator Demonstration 17
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