Datasheet
R = 25
RID
V
RIDD
I
STC
= 25
V
RIDD
I + I
STC_use IC1
916
I
(
BUS
mA)
3
914
910
912
4
5
6
7
V (V)
STC
8
1 2
TSS721A
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................................................................................................................................................ SLAS222A –APRIL 1999–REVISED SEPTEMBER 2009
Slave Supply 3.3-V
The TSS721A has an internal 3.3-V voltage regulator. The output power of this voltage regulator is supplied by
the storage capacitor C
STC
at pin STC. The storage capacitor C
STC
at pin STC is charged with constant current
I
STC_use
from the current source CS1. The maximum capacitor voltage is limited to REF1. The charge current I
STC
has to be defined by an external resistor at pin RIDD.
The adjustment resistor RRIDD can be calculated using Equation 2.
(2)
Where,
I
STC
= current from current source CS1
I
STC_use
= charge current for support capacitor
I
CI
= internal current
V
RIDD
= voltage on pin RIDD
R
RIDD
= value of adjustment resistor
The voltage level of the storage capacitor C
STC
is monitored with comparator TC1. Once the voltage V
STC
reaches V
VDD_on
, the switch S
VDD
connects the stabilised voltage V
VDD
to pin VDD. VDD is turned off if the
voltage V
STC
drops below the V
VDD_off
level.
Voltage variations on the capacitor C
STC
create bus current changes (see Figure 4).
Figure 4. Single Mode Bus Load
At a bus fault the shut down time of VDD (t
off
) in which data storage can be performed depends on the system
current I
VDD
and the value of capacitor C
STC
. See Figure 5, which shows a correlation between the shutdown of
the bus voltage V
BUS
and V
DD_off
and t
off
for dimensioning the capacitor.
The output VS is meant for slave systems that are driven by the bus energy, as well as from a battery should the
busline voltage fail. The switching of VS is synchronised with VDD and is controlled by the comparator TC1. An
external transistor at the output VS allows switching from the Meter-Bus remote supply to battery.
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