Datasheet

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TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
Bits 15,14 — RESERVED
These bits are reserved and should be written to 0. If read, they read back as 0.
Bits [13:8] — IO5- IO0
GPIO Directional Control. These 6 bits control the direction of the TSC2301s six GPIO pins. When one of these
bits is set to one, the corresponding GPIO pin is configured as an output. When one of these bits is set to zero,
the corresponding GPIO pin is configured as an input. The default setting of these bits is zero (all inputs).
Bits 7,6 — RESERVED
These bits are reserved, and should be written to 0. If read, they read back as 0.
Bits [5:0] — GPIO5- GPIO0
GPIO Data. These bits control the data on the GPIO pins. When a GPIO pin is configured as an output, the data
written to one of these bits is driven on the corresponding GPIO pin. When a GPIO pin is configured as an input,
the data input on the GPIO pin is returned to the corresponding register bit, and can be read by the host
processor.
DAC BASS-BOOST FILTER COEFFICIENT REGISTERS (Page 02, Addresses 07h-1Ah)
The DAC bass-boost coefficient registers implement the transfer function described. The coefficients are
represented by 16-bit twos complement integers with values ranging from -32768 to 32767.
The DAC bass-boost coefficient registers are formatted as follows:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Table 57. DAC Bass-Boost Coefficient Registers
Address DAC Channel Coefficient Default
07h Left N0 6BE2
08h Left N1 9667
09h Left N2 675D
0Ah Left N3 6BE2
0Bh Left N4 9667
0Ch Left N5 675D
0Dh Left D1 7D82
0Eh Left D2 84EF
0Fh Left D4 7D82
10h Left D5 84EF
11h Right N0 6BE2
12h Right N1 9667
13h Right N2 675D
14h Right N3 6BE2
15h Right N4 9667
16h Right N5 675D
17h Right D1 7D82
18h Right D2 84EF
19h Right D4 7D82
1Ah Right D5 84EF
85