Datasheet

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DGND
AFILTL
VREF–
VREF+
VCM
MICIN
LLINEIN
RLINEIN
C4
C3
C2
C1
R4
R3
R2
AFILTR
MICBIAS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
Y–
X+
MONO+
MONO–
VOUTL
VOUTR
AGND
AVDD
HPL
HPR
HPGND
X–
Y+
HPVDD
AUX1
AUX2
TSC2301
VBAT1
VBAT2
VREFIN
ARNG
AOUT
POL
PENIRQ
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5/CLKO
DVDD
SS
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KBIRQ
DGND
DVDD
I2SDOUT
I2SDIN
LRCLK
BCLK
MCLK
R1
COO
COI
DAV
MISO
MOSI
SCLK
RESET
TSC2301
SLAS371D SEPTEMBER 2002 REVISED AUGUST 2004
PIN ASSIGNMENT
(TOP VIEW)
PIN DESCRIPTION
VFBGA TQFP I/O NAME DESCRIPTION
BALL PIN
A10 1 I VBAT1 Battery monitor input 1
B9 2 I VBAT2 Battery monitor input 2
A9 3 I/O VREFIN SAR reference voltage
B8 4 ARNG DAC analog output range set
A8 5 O AOUT Analog output current from DAC
A7 6 O PENIRQ Pen interrupt
B6 7 I POL SPI clock polarity
A6 8 I/O GPIO_0 General-purpose input/output pin
A5 9 I/O GPIO_1 General-purpose input/output pin
B4 10 I/O GPIO_2 General-purpose input/output pin
A4 11 I/O GPIO_3 General-purpose input/output pin
B3 12 I/O GPIO_4 General-purpose input/output pin
A3 13 I/O GPIO_5/CLKO General-purpose input/output pin/buffered oscillator clock out
NC 14 I DVDD Digital voltage supply
A2 15 I DGND Digital ground
6