Datasheet

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Keypad Mask Register (Page 1, Address 10H)

Secondary Configuration Register (Page 1, Address 06H):

TSC2301

SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004

The Keypad Mask register is formatted as follows:

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

MSB LSB

M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0

This is the same format as used in the keypad data register (Page 0, Address 04H). Each bit in these registers

represents one key on the keypad. In the mask register, if a bit is set (1), then that key is not detected in keypad

scans. Pressing that key on the keypad also does not cause a KBIRQ, if the bit is set. If the bit is cleared (0), the

corresponding key is detected when pressed. A 16-key keypad is mapped into the keypad mask (and keypad

data) register as shown in Table 23 . The default value for this register is 0000H, detecting all key presses.

Table 23. Keypad to Key Bit Mapping

C1 C2 C3 C4

R1 K0 K1 K2 K3

R2 K4 K5 K6 K7

R3 K8 K9 K10 K11

R4 K12 K13 K14 K15

The result of a keypad scan appears in the keypad data register. Each bit is set in this register, corresponding to

the key(s) actually pressed. For example, if only key 1 was pressed on a particular scan, the data in the register

would read as 0x0002; however, if keys 6, 8, and 13 were all pressed simultaneously on that scan, the data

would read as 0x2140.

Multiple keys can be pressed simultaneously and are generally decoded correctly by the keypad scan circuitry.

However, keys that land on three corners of a rectangle can cause a false reading of a key on the fourth corner

of the rectangle. For example, if keys 0, 3, and 11 were pressed simultaneously, the KEY0, KEY3, and KEY11

bits are set, but the KEY8 bit is also set. Thus, when considering using multiple-key combinations in an

application, try to avoid combinations that put three keys on the corners of a rectangle.

This register allows the user to read the status of the DAV pin through the SPI interface. It controls the behavior

of the KBIRQ signal, as well as provides control of the audio codec PLL.

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

MSB LSB

SDAV/K KBC0 PLLO PCTE PDC3 PDC2 PDC1 PDC0 A3 A2 A1 A0 N3 N2 N1 N0

BC1