Datasheet

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TSC2301 Configuration Control Register (Page 1, Address 05H)
TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
Table 15. PDN Bit Operation
PDN
Value Description
0 Internal reference is powered at all times
1 Internal reference is powered down between conversions.
(default)
Note that the PDN bit, in concert with the INT bit, creates a few possibilities for reference behavior. These are
detailed in Table 16 .
Table 16. Reference Behavior Possibilities
INT PDN Reference Behavior
0 0 External reference used, internal reference powered
down.
0 1 External reference used, internal reference powered
down.
1 0 Internal reference used, always powered up
1 1 Internal reference used, powers up during conversions
and then powers down.
Bit 0 — RFV
Reference Voltage Control. This bit selects the internal reference voltage, either 1.2 V or 2.5 V. The default value
is 1.2 V. This bit is the same whether reading or writing.
Table 17. RFV Bit Operation
RFV
Value Description
0 1.2-V reference voltage (default)
1 2.5-V reference voltage
This control register controls the configuration of the precharge and sense times for the touch detect circuit. The
register is formatted as follows:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB LSB
RES RES RES RES RES RES RES RES RES RES PRE2 PRE1 PRE0 SNS2 SNS1 SNS0
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