Datasheet

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DAC Control Register (Page 1, Address 02H)

TSC2301

SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004

Bits[7:6] — AV1, AV0

Converter Averaging Control. These two bits (see Table 9 ) allow you to specify the number of averages the

converter performs. Note that when averaging is used, the STS/STP bit and the DAV output indicates that the

converter is busy until all conversions necessary for the averaging are complete. The default state for these bits

is 00, selecting no averaging. These bits are the same whether reading or writing.

Table 9. ADC Conversion Averaging Control

AV1 AV0 Function

0 0 None (one conversion) (default)

0 1 4 data averages

1 0 8 data averages

1 1 16 data averages

Bits[5:4] — CL1, CL0

Conversion Clock Control. These two bits specify the internal clock rate which the ADC uses when performing a

conversion. See Table 10 . These bits are the same whether reading or writing.

Table 10. ADC Conversion Clock Control

CL1 CL0 Function

0 0 8-MHz internal clock rate - 8-bit resolution only

(default)

0 1 4-MHz internal clock rate - 8- or 10-bit resolution

only

1 0 2-MHz internal clock rate

1 1 1-MHz internal clock rate

Bits [3:1] — PV2 - PV0

Panel Voltage Stabilization Time Control. These bits allow the user to specify a delay time from when a driver is

turned on to the time sampling begins and a conversion is started. In self-controlled mode, when a pen touch is

detected, the part first turns on a driver, waits a programmed delay time set by PV2-PV0, and then begins

sampling and A/D conversion. See Table 11 for settings of these bits. The default state is 000, indicating a 0 µs

stabilization time. These bits are the same whether reading or writing.

Table 11. Panel Voltage Stabilization Time Control

PV2 PV1 PV0 Stabilization Time

0 0 0 0 µs (default)

0 0 1 100 µs

0 1 0 500 µs

0 1 1 1 ms

1 0 0 5 ms

1 0 1 10 ms

1 1 0 50 ms

1 1 1 100 ms

Bit 0

This bit is reserved. When read, it always reads as a zero.

The single bit in this register controls the power down control of the onboard digital-to-analog converter (DAC).

This register is formatted as follows: