Datasheet
TSC2101
SLAS392D− JUNE 2003 − REVISED MAY 2005
www.ti.com
11
AUDIO INTERFACE TIMING DIAGRAMS
ts
(DI)
th
(DI)
td
(DO−BCLK)
td
(DO−WS)
WCLK
BCLK
SDOUT
SDIN
td
(WS)
Figure 1. I2S/LJ/RJ in Master Mode
Typical Timing Requirements (see Figure 1)
PARAMETER
(1)
IOVDD = 1.1 V IOVDD = 3.3 V
UNITS
PARAMETER
(1)
MIN MAX MIN MAX
UNITS
t
d
(WS) WCLK delay 30 15 ns
t
d
(DO−WS) WCLK to DOUT delay (for LJF mode) 30 15 ns
t
d
(DO−BCLK) BCLK to DOUT delay 30 15 ns
t
s
(DI) SDIN setup 6 6 ns
t
h
(DI) SDIN hold 6 6 ns
t
r
Rise time 18 6 ns
t
f
Fall time 18 6 ns
(1)
These parameters are based on characterization and are not tested in production.
ts
(DI)
th
(DI)
td
(DO−BCLK)
WCLK
BCLK
SDOUT
SDIN
td
(WS)
td
(WS)
Figure 2. DSP Timing in Master Mode
Typical Timing Requirements (see Figure 2)
PARAMETER
(1)
IOVDD = 1.1 V IOVDD = 3.3 V
UNITS
PARAMETER
(1)
MIN MAX MIN MAX
UNITS
t
d
(WS) WCLK delay 30 15 ns
t
d
(DO−BCLK) BCLK to DOUT delay 30 15 ns
t
s
(DI) SDIN setup 6 6 ns
t
h
(DI) SDIN hold 6 6 ns
t
r
Rise time 18 6 ns
t
f
Fall time 18 6 ns
(1)
These parameters are based on characterization and are not tested in production.