Datasheet

PIN CONFIGURATIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AUX
NC
A0
A1
SCL
SDA
PENIRQ
NC
VDD/REF
X+
Y+
X-
Y-
GND
NC
NC
TSC2007
C lumnso
(FRONTVIEW)
A CB D
GND
A0 A1VDD/REF
Y-Y+X+
3
2
1
SCL
PENIRQ
SDA
AUX
Rows
X-
TSC2007
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...................................................................................................................................................... SBAS405A MARCH 2007 REVISED MARCH 2009
PW PACKAGE
YZG PACKAGE
TSSOP-16
WCSP-12
(TOP VIEW)
(TOP VIEW, SOLDER BUMPS ON BOTTOM SIDE)
PIN ASSIGNMENTS
PIN NO.
PIN
TSSOP WCSP NAME I/O A/D DESCRIPTION
1 A2 VDD/REF Supply voltage and external reference input
2 A3 X+ I A X+ channel input
3 B3 Y+ I A Y+ channel input
4 C3 X I A X channel input
5 D3 Y I A Y channel input
6 D2 GND Ground
7 NC No connection
8 NC No connection
9 NC No connection
10 B1 PENIRQ O D Data available interrupt output. A delayed (process delay) pen touch detect. Pin polarity with active low.
11 C1 SDA I/O D Serial data I/O
Serial clock. This pin is normally an input, but acts as an output when the device stretches the clock to
12 D1 SCL I/O D
delay a bus transfer.
13 C2 A1 I D Address input bit 1
14 B2 A0 I D Address input bit 0
15 NC No connection
16 A1 AUX I A Auxiliary channel input
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Product Folder Link(s): TSC2007