Datasheet

TSC2007
SBAS405A – MARCH 2007 – REVISED MARCH 2009 ...................................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At T
A
= – 40 ° C to +85 ° C, V
DD
= +1.2V to +3.6V, unless otherwise noted.
TSC2007
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DIGITAL INPUT/OUTPUT
Logic family CMOS
1.2V ≤ V
DD
< 1.6V 0.7 × V
DD
V
DD
+ 0.3 V
V
IH
1.6V ≤ V
DD
≤ 3.6V 0.7 × V
DD
V
DD
+ 0.3 V
1.2V ≤ V
DD
< 1.6V – 0.3 0.2 × V
DD
V
V
IL
1.6V ≤ V
DD
≤ 3.6V – 0.3 0.3 × V
DD
V
I
IL
SCL and SDA pins – 1 1 µ A
Logic level
C
IN
SCL and SDA pins 10 pF
V
OH
I
OH
= 2 TTL loads V
DD
– 0.2 V
DD
V
V
OL
I
OL
= 2 TTL loads 0 0.2 V
I
LEAK
Floating output – 1 1 µ A
C
OUT
Floating output 10 pF
Data format Straight binary
POWER-SUPPLY REQUIREMENTS
Power-supply voltage, V
DD
Specified performance 1.2 3.6 V
32.56k eq rate 128 190 µ A
V
DD
= 1.2V
8.2k eq rate 32.24 µ A
12-bit Fast mode
34.42k eq rate 165 240 µ A
Quiescent supply current
(clock = 400kHz) V
DD
= 1.8V
(V
DD
with sensor off)
8.2k eq rate 39.31 µ A
PD[1:0] = 0,0
34.79k eq rate 226.2 335 µ A
V
DD
= 2.7V
8.2k eq rate 53.32 µ A
Power down supply current Not addressed, SCL = SDA = 1 0 0.8 µ A
POWER ON/OFF SLOPE REQUIREMENTS
V
DD
off ramp T
A
= – 40 ° C to +85 ° C 2 kV/s
T
A
= – 40 ° C to +85 ° C, V
DD
= 0V 1.2 s
V
DD
off time
T
A
= – 20 ° C to +85 ° C, V
DD
= 0V 0.3 s
V
DD
on ramp T
A
= – 40 ° C to +85 ° C 12 kV/s
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