Datasheet

POWER-ON RESET (POR)
1.2Vto3.6V
0.9V
0.3V
0V
V
DD
t
VDD_OFF_RAMP
t
VDD_OFF
t
VDD_ON_RAMP
Temperature( C)°
V OffTimeforValidPOR(s)
DD
-40 -20
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0 20 40 60 80 100
RecommendedV OffTime
forT = 40 Cto+85 C- ° °
DD
A
TypicalV OffTimeforVariousTemperatures
DD
TSC2007
www.ti.com ...................................................................................................................................................... SBAS405A – MARCH 2007 – REVISED MARCH 2009
During TSC2007 power-up, an internal power-on reset (POR) is automatically implemented. The POR brings the
TSC to the default working condition, and checks the A0 and A1 pins for the two LSBs of the I
2
C address. The
TSC2007 senses the power-up curve to decide whether or not to implement a POR.
It is required to follow the power-on/off slope and interval requirements, as provided in the Electrical
Characteristics , in order to ensure a proper POR of the TSC2007.
Figure 35. Power-On Reset Timing
Table 7. Timing Requirements for Figure 35
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
DD
off ramp T
A
= – 40 ° C to +85 ° C 2 kV/s
T
A
= – 40 ° C to +85 ° C, V
DD
= 0V 1.2 s
V
DD
off time
T
A
= – 20 ° C to +85 ° C, V
DD
= 0V 0.3 s
V
DD
on ramp T
A
= – 40 ° C to +85 ° C 12 kV/s
Figure 36. V
DD
Off Time vs Temperature
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Product Folder Link(s): TSC2007