Datasheet

DIGITAL INTERFACE
ADDRESS BYTE
COMMAND BYTE
TSC2007
SBAS405A MARCH 2007 REVISED MARCH 2009 ......................................................................................................................................................
www.ti.com
The TSC2007 has a 7-bit slave address word. The first five bits (MSBs) of the slave address are factory-preset to
comply with the I
2
C standard for A/D converters and are always set at '10010'. The logic state of the address
input pins (A1-A0) determines the two LSBs of the device address to activate communication. Therefore, a
maximum of four devices with the same preset code can be connected on the same bus at one time.
The A1-A0 address inputs are read whenever an address byte is received, and should be connected to the
supply pin (VDD/REF) or the ground pin (GND). The slave address is latched into the TSC2007 on the falling
edge of SCL after the read/write bit has been received by the slave.
The last bit of the address byte (R/ W) defines the operation to be performed. When set to a '1', a read operation
is selected; when set to a 0 , a write operation is selected. Following the START condition, the TSC2007
monitors the SDA bus, checking the device type identifier being transmitted. Upon receiving the '10010' code, the
appropriate device select bits, and the R/ W bit, the slave device outputs an acknowledge signal on the SDA line.
Table 1. I
2
C Slave Address Byte
MSB LSB
D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 1 0 A1 A0 R/ W
Bit D0: R/ W
1: I
2
C master read from TSC (I
2
C read addressing).
0: I
2
C master write to TSC (I
2
C write addressing).
Table 2. Command Byte Definition (Excluding the Setup Command)
(1)
BIT NAME DESCRIPTION
D7-D4 C3-C0 All Converter Function Select bits as detailed in Table 3 , except for the setup command ('1011').
00: Power down between cycles. PENIRQ enabled.
01: A/D converter on. PENIRQ disabled.
D3-D2 PD1-PD0
10: A/D converter off. PENIRQ enabled.
11: A/D converter on. PENIRQ disabled.
0: 12-bit (Lower speed referred to as the 2MHz clock).
D1 M
1: 8-bit (Higher speed referred to as the 4MHz clock).
D0 X Don't care.
(1) The command byte definition for the setup command is shown in Table 4 .
Bits D7-D4: C3-C0 Converter function select bits. These bits select the input to be converted and the converter
function to be executed, activate the drivers, and configure the PENIRQ pull-up resistor (R
IRQ
). Table 3 lists the
possible converter functions.
Bits D3-D2: PD1-PD0 Power-down bits. These two bits select the power-down mode that the TSC2007 will be
in after the current command completes, as shown in Table 2 .
It is recommended to set PD0 = 0 in each command byte to get the lowest power consumption possible. If
multiple X-, Y-, and Z-position measurements will be done one right after another (such as when averaging), PD0
=1 will leave the touch screen drivers on at the end of each conversion cycle.
Bit D1: M Mode bit. If M = 0, the TSC2007 is in 12-bit mode. If M = 1, 8-bit mode is selected.
Bit D0: X Don t care.
24 Submit Documentation Feedback Copyright © 2007 2009, Texas Instruments Incorporated
Product Folder Link(s): TSC2007