Datasheet

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PIN CONFIGURATION
Columns
(FRONT VIEW)
A
C
EB D F
SNSGNDNCNC NCNCDGND
4
Y-
NCNC NC
I/OVDD
3
X-
NCNC NC
AUX
2
SUBGND
X+VREF Y+
SNSVDD
AGND
1
CS
SCLK
PINTDAV
SDO
SDI
RESET
5
Rows
TSC2005
SBAS379C – DECEMBER 2006 – REVISED MARCH 2008
YZL PACKAGE
WCSP-18
(TOP VIEW, SOLDER BUMPS ON BOTTOM SIDE)
PIN ASSIGNMENTS
PIN
NO. NAME I/O A/D DESCRIPTION
A1 RESET I D System reset. All register values reset to default value.
A2 DGND Digital ground
A3 I/OVDD Digital I/O interface voltage
A4 AUX I A Auxiliary channel input
A5 AGND Analog ground
B1 PINTDAV O D Interrupt output. Data available or PENIRQ depends on setting. Pin polarity with active low.
B2, B3,
B4, C2,
No internal connection, but solder bumps are populated. These pins may be connected to analog ground for
D2, D3, NC
mechanical stability.
D4, E2,
E3, E4
B5 VREF I A External reference input
C1 SDI I D Serial data input. This input is the MOSI signal for the SPI protocol.
C3, C4 NC No solder bumps for these locations.
C5 SNSVDD Power supply for sensor drivers and other analog blocks.
D1 SCLK I D Serial clock input
D5 X+ I A X+ channel input
E1 SDO O D Serial data output. This output is the MISO signal for the SPI protocol.
E5 Y+ I A Y+ channel input
F1 CS I D Chip select. This input is the slave select ( SS) signal for the SPI protocol.
F2 SNSGND Sensor driver return
F3 Y – I A Y – channel input
F4 X – I A X – channel input
F5 SUBGND Substrate ground (for ESD current)
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Product Folder Link(s): TSC2005