Datasheet

4
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TSC2000
SBAS257
TIMING DIAGRAM
All specifications typical at –40°C to +85°C, +V
DD
= +2.7V.
t
td
t
Lag
t
dis
t
Lead
t
sck
t
wsck
t
wsck
t
hi
t
su
t
ho
t
a
t
v
t
r
t
f
SS
SCLK
MSB OUT
MSB IN LSB IN
LSB OUTBIT 6 ... 1
BIT 6 ... 1
MISO
MOSI
PARAMETER CONDITIONS MIN TYP MAX UNITS
SCLK Period t
sck
30 ns
Enable Lead Time t
Lead
15 ns
Enable Lag Time t
Lag
15 ns
Sequential Transfer Delay t
td
30 ns
Data Setup Time t
su
10 ns
Data Hold Time (inputs) t
hi
10 ns
Data Hold Time (outputs) t
ho
0ns
Slave Access Time t
a
15 ns
Slave D
OUT
Disable Time t
dis
15 ns
DataValid t
v
10 ns
Rise Time t
r
30 ns
Fall Time t
f
30 ns
TIMING CHARACTERISTICS
(1)(2)
At –40°C to +85°C, +V
DD
= +2.7V, V
REF
= +2.5V, unless otherwise noted.
TSC2000
NOTES: (1) All input signals are specified with t
r
= t
f
= 5ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2. (2) See timing diagram below.