Datasheet

5−6
5.6 Isochronous Transmit Context n Timestamp Offset Registers
The value of these registers is added as an offset to the cycle timer value when using the MPEG, DV, and CIP
enhancements. A timestamp offset register is implemented per isochronous transmit context. The n value following
the offset indicates the context number (n = 0, 1, 2, 3, …, 7). These registers are programmed by software as
appropriate. See Table 5−4 for a complete description of the register contents.
Offset: A90h + (4*n)
Type: Read/Write, Read only
Default: 0000 0000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 5−4. Isochronous Transmit Context n Timestamp Offset Register Description
BIT FIELD NAME TYPE DESCRIPTION
31 DisableInitialOffset R/W Bit 31 disables the use of the initial timestamp offset when the MPEG2 enhancements are enabled.
A value of 0 indicates the use of the initial offset; a value of 1 indicates that the initial offset must not
be applied to the calculated timestamp. This bit has no meaning for the DV timestamp
enhancements.
30−25 RSVD R Reserved. Bits 30−25 return 0s when read.
24−12 CycleCount R/W This field adds an offset to the cycle count field in the timestamp when the DV or MPEG2
enhancements are enabled. The cycle count field is incremented modulo 8000; therefore, values in
this field must be limited between 0 and 7999.
11−0 CycleOffset R/W This field adds an offset to the cycle offset field in the timestamp when the DV or MPEG2
enhancements are enabled. The cycle offset field is incremented modulo 3072; therefore, values in
this field must be limited between 0 and 3071.