Datasheet

4−26
4.32 Node ID Register
The node ID register contains the address of the node on which the OHCI-Lynx chip resides, and indicates the valid
node number status. The 16-bit combination of the busNumber field (bits 15−6) and the NodeNumber field (bits 5−0)
is referred to as the node ID. See Table 4−25 for a complete description of the register contents.
Type: Read/Write/Update, Read/Update, Read-only
Offset: E8h
Default: 0000 FFXXh
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Default 1 1 1 1 1 1 1 1 1 1 X X X X X X
Table 4−25. Node ID Register Description
BIT FIELD NAME TYPE DESCRIPTION
31 iDValid RU ID valid. Bit 31 indicates whether or not the TSB82AA2B device has a valid node number. It is cleared
when a 1394 bus reset is detected, and set to 1 when the TSB82AA2B device receives a new node
number from its PHY device.
30 root RU Root. Bit 30 is set to 1 during the bus reset process if the attached PHY device is root.
29−28 RSVD R Reserved. Bits 29−28 return 0s when read.
27 CPS RU Cable power status. Bit 27 is set to 1 if the PHY device is reporting that cable power status is OK.
26−16 RSVD R Reserved. Bits 26−16 return 0s when read.
15−6 BusNumber RWU Bus number. This field identifies the specific 1394 bus the TSB82AA2B device belongs to when
multiple 1394-compatible buses are connected via a bridge.
5−0 NodeNumber RU Node number. This field is the physical node number established by the PHY device during self-ID.
It is automatically set to the value received from the PHY device after the self-ID phase. If the PHY
device sets the NodeNumber to 63, software must not set bit 15 (run) in the asynchronous context
control register (see Section 4.40, Asynchronous Context Control Register) for either of the AT DMA
contexts.