Datasheet

4−11
4.15 Vendor ID Register
The vendor ID register provides the company ID of an organization that specifies any vendor-unique registers or
features. The TSB82AA2B device implements several unique features with regards to OHCI. Therefore, bits 23−0
are programmed with TI OUI, 0X08 0028.
Type: Read/Update, Read only
Offset: 40h
Default: 0X08 0028h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Default 0 0 0 0 0 X X 0 0 0 0 0 1 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Default 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0
Table 4−11. Vendor ID Register Description
BIT FIELD NAME TYPE DESCRIPTION
31−27 RSVD R Reserved. Bits 31−27 return 0s when read.
26 PME_Enhance RU PME enhance. Bit 26 is conditionally set based on the value of bit 10 (Ignore
IntMask.masterIntEnable_for_pme) in the miscellaneous configuration register at offset F0h in the
PCI configuration space (see Section 3.23, Miscellaneous Configuration Register). If bit 10 is set to
1, bit 26 is set to 1 to indicate that the device supports the generation of PME
, regardless of the
status of bit 31 (masterIntEnable) in the interrupt mask register at OHCI offset 88h (see Section
4.22, Interrupt Mask Register). If bit 10 is not set, bit 26 returns 0.
25 OHCI12_draft RU OHCI 1.2 draft features. Bit 25 is conditionally set based on the value of bit 14 (EnableDraft) in the
link enhancement control register at offset F4h in the PCI configuration space (see Section 3.24,
Link Enhancement Control Register). If bit 14 is set to 1, bit 25 is set to 1 to indicate that the device
supports some features which have been defined in the OHCI 1.2 specification draft. If bit 14 is not
set, bit 25 returns 0.
24 Iso_enhancements R Isochronous enhancements. Bit 24 is set to 1 indicating that it supports the isochronous
enhancements defined in Sections 4.4 and 4.5.
23−0 vendorCompanyID R Vendor company organizational unique ID. This field returns TI OUI, 24’h080028, indicating that the
device supports unique features defined by TI.