Datasheet

4−9
4.10 GUID High Register
The GUID high register represents the upper quadlet in a 64-bit global unique ID (GUID), which maps to the third
quadlet in the Bus_Info_Block. This register contains node_vendor_ID and chip_ID_hi fields. This register initializes
to 0s on a system (hardware) reset, which is an illegal GUID value. If a serial EEPROM is detected, the contents of
this register are loaded through the serial EEPROM interface after a G_RST
. At that point, the contents of this register
cannot be changed. If no serial EEPROM is detected, the contents of this register are loaded by the BIOS. At that
point, the contents of this register cannot be changed. All bits in this register are reset by G_RST
only.
Type: Read only
Offset: 24h
Default: 0000 0000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4.11 GUID Low Register
The GUID low register represents the lower quadlet in a 64-bit GUID, which maps to chip_ID_lo in the
Bus_Info_Block. This register initializes to 0s on a system (hardware) reset and behaves identically to the GUID high
register at OHCI offset 24h (see Section 4.10, GUID High Register).
Type: Read only
Offset: 28h
Default: 0000 0000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0