Datasheet

3−1
3 TSB82AA2B Controller Programming Model
This section describes the internal PCI configuration registers used to program the TSB82AA2B device. All registers
are detailed in the same format − a brief description for each register, followed by the register offset and a bit table
describing the reset state for each register.
A bit description table, typically included when the register contains bits of more than one type or purpose, indicates
bit field names, field access tags that appear in the type column, and a detailed field description. Table 3−1 describes
the field access tags.
Table 3−1. Bit Field Access Tag Descriptions
ACCESS TAG NAME MEANING
R Read Field can be read by software.
W Write Field can be written by software to any value.
S Set Field can be set by a write of 1. Writes of 0 have no effect.
C Clear Field can be cleared by a write of 1. Writes of 0 have no effect.
U Update Field can be autonomously updated by the TSB82AA2B device.
Figure 3−1 shows a simplified block diagram of the TSB82AA2B device.