Datasheet

2−6
Table 2−3. Signal Names Sorted Alphanumerically to Terminal Number (Continued)
TERMINAL NAME
NUMBER
TERMINAL NAME
NUMBER
TERMINAL NAME
NUMBER
TERMINAL NAME
PGE GGW
TERMINAL NAME
PGE GGW
TERMINAL NAME
PGE GGW
PHY_CTL0 134 B07 PHY_LPS 144 B03 V
CC
42 E17
PHY_CTL1 133 A07 PHY_LREQ 141 B04 V
CC
62 F03
PHY_D0 132 D08 PHY_PCLK 138 A05 V
CC
75 H04
PHY_D1 131 B08 PHY_PINT 143 A03 V
CC
86 K14
PHY_D2 130 A08 REG_EN 2 D03 V
CC
102 N01
PHY_D3 129 B09 REG18 16 H03 V
CC
126 P11
PHY_D4 128 C09 REG18 87 K15 V
CC
135 P15
PHY_D5 125 B10 SCL 3 D02 V
CC
139 R05
PHY_D6 124 C10 SDA 4 D01 V
CCP
21 A12
PHY_D7 123 D10 V
CC
8 A09 V
CCP
55 H17
PHY_LCLK 136 A06 V
CC
15 C05 V
CCP
91 K01
PHY_LINKON 142 C04 V
CC
31 D07 V
CCP
117 U10
The terminals are grouped in tables by functionality, such as PCI system function and power supply function (see
Table 2−4 through Table 2−8). The terminal numbers are also listed for convenient reference.
Table 2−4. Power Supply Terminals
TERMINAL
NAME
NUMBER
I/O DESCRIPTION
NAME
PGE GGW
I/O
DESCRIPTION
GND
9, 22, 32, 43,
52, 63, 76, 81,
93, 103, 112,
122, 127, 137,
140
A04, A10, C06,
C13, D09, E15,
G04, H14, K04,
L14, N03, N15,
P09, R06, R12
−
Ground terminals. These terminals must be tied together to the low-impedance circuit
board ground plane.
REG18
16
87
H03
K15
−
The REG18 terminals are connected to the internal 1.8-V core voltage. They provide
a mechanism to provide local bypass for the internal core voltage or to externally
provide the 1.8 V to the core if the internal regulator is disabled.
REG_EN 2 D03 I
Regulator enable. When this terminal is low, the internal regulator is enabled and
generates the 1.8-V internal core voltage from the 3.3-V supply voltage. If it is disabled,
1.8 V must be provided to the REG18 terminals for normal operation.
V
CC
8, 15, 31, 42,
62, 75, 86,
102, 126, 135,
139
A09, C05, D07,
E17, F03, H04,
K14, N01, P11,
P15, R05
−
3.3-V power supply terminals. A parallel combination of high frequency decoupling
capacitors near each terminal is suggested, such as 0.1 μF and 0.001 μF. Lower
frequency 10-μF filtering capacitors are also recommended. They must be tied to a
low-impedance point on the circuit board.
V
CCP
21, 55, 91, 117
A12, H17, K01,
U10
−
PCI signaling clamp voltage power input. PCI signals are clamped per the PCI Local
Bus Specification. In addition, if a 5-V ROM is used, the V
CCP
terminal must be
connected to 5 V.