Information

Texas Instruments Signal Chain Guide 2013 | 119
Interface
SerDes – Video and Imaging
*Suggested resale price in U.S. dollars in quantities of 1,000. See www.ti.com/hirel for HiRel options.
Video & Imaging
Device -
Serializer
Device -
Deserializer
Parallel
Width
Parallel
Width
Min CLK Freq
(MHz)
Max CLK
Freq
(MHz)
Signal
Conditioning
- SER
Signal
Conditioning
- DES
Serial Data
Channels
HiRel
Avail. Package Price*
Channel Link III
DS92LX1621 DS92LX1622 16 LVCMOS 10 50 — EQ 1 N
LLP-32,
LLP-40
5.10
DS92LX2121 DS92LX2122 21 LVCMOS 10 50 — EQ 1 N
LLP-40,
LLP-48
5.30
Channel Link II
DS92LV2421 DS92LV2422 24 LVCMOS 10 75 VOD, De-E EQ 1 N
LLP-48,
LLP-60
5.95
DS92LV2411 DS92LV2412 24 LVCMOS 5 50 VOD, De-E EQ 1 N
LLP-48,
LLP-60
4.95
DS92LV0421 DS92LV0422 4 LVDS 10 75 VOD, De-E EQ 1 N
LLP-36,
LLP-48
6.25
DS92LV0411 DS92LV0412 4 LVDS 5 50 VOD, De-E EQ 1 N
LLP-36,
LLP-48
4.95
DS99R103 DS99R104 24 LVCMOS 3 40 Pre-E — 1 N
LLP-48,
LLP-60
4.80
DS92LV3241 DS92LV3242 32 LVCMOS 20 85 Pre-E — 4 N TQFP-64 6.95
DS92LV3221 DS92LV3222 32 LVCMOS 20 50 Pre-E — 2 N TQFP-64 5.50
Channel Link I
DS90CR217 DS90CR218A 21 LVCMOS 20/12 85 — — 3D+C N TSSOP-48 3.42
DS90CR287 DS90CR288A 28 LVCMOS 20 85 — — 4D+C N TSSOP-56 5.55
DS90CR483A DS90CR484A 48 LVCMOS 33 112 Pre-E — 8D+C N TQFP-100 10.50
DS90CR485 DS90CR486 24/48 LVCMOS 66 133 Pre-E — 8D+C N TQFP-100 12.90
Get more information: www.ti.com/product/DS92LX1621,
www.ti.com/product/DS92LX1622
10 to 50 MHz DC-Balanced Channel Link III Bidirectional Control Serializer
DS92LX1621/2
The DS92LX1621 / DS92LX1622 chipset offers a Channel Link III interface with a high-
speed forward channel and a full-duplex back channel for data transmission over a
single differential pair. The Serializer/Deserializer pair is targeted for direct connections
between automotive camera systems and Host Controller/Electronic Control Unit (ECU).
Using embedded clock technology allows transparent full-duplex communication over
a single differential pair, carrying asymmetrical bi-directional control information without
the dependency of video blanking intervals. This single serial stream simplifies trans
-
ferring a wide data bus over PCB traces and cable by eliminating the skew problems
between parallel data and clock paths. This significantly saves system cost by narr
ow-
ing data paths that in turn reduce PCB layers, cable width, and connector size and pins.
DS92LX1621/2 applications diagram
Key Features
• Configurabledatathroughput
• 12–bit(min)upto600Mbits/sec
• 18–bit(max)upto900Mbits/sec
• 10MHzto50MHzinputclocksupport
• EmbeddedclockwithDCbalanced
coding to support AC-coupled
interconnects
• Capabletodriveupto10meters
shielded twisted-pair
• Bi-directionalcontrolinterfacechannel
with I
2
C support
• 1.8Vor3.3Vcompatibleparallelbus
interface
• Singlepowersupplyat1.8V
Applications
• Militaryradar/sonar
• Patientmonitoring
• Oscilloscopes
Microcontroller/
ECU
DeserializerSerializer
Image
Sensor
Channel Link III
Bi-direction
Back Channel
Bi-directional
Back Ch.
Cntl Bus
Bi-
directional
Back Ch.
Cntl Bus
Parallel
Data In
16
2
2
Parallel
Data Out
16
DS92LX1622DS92LX1621