Datasheet

TPA2+
TPA2-
TPB2+
TPB2-
TPA1+
TPA1-
TPB1+
TPB1-
TPB0+
TPB0-
CPS
LPS
CNA
PINT
LCLK
LREQ
CTL0
CTL1
D0
D5
D1
D2
D3
D4
D6
D7
RESETz
LKON/DS2
PD
BMODE
PCLK
PC0
PC1
PC2
SE
SM
DS0
DS1
TESTM
VREG_PD
XI
TPA0+
TPA0-
R0
R1
TPBIAS0
TPBIAS1
TPBIAS2
Link
Interface
I/O
Received Data
Decoder/Retimer
Arbitration
and Control
State Machine
Logic
Voltage
Regulator
Transmit
Data
Encoder
Crystal Oscillator,
PLL System,
and Transmit
Clock Generator
Bilingual
Cable Port 2
Bilingual
Cable Port 1
Bilingual
Cable Port 0
Bias Voltage
and
Current
Generator
TSB81BA3E
www.ti.com SLLS783A –MAY 2009–REVISED MAY 2010
FUNCTIONAL BLOCK DIAGRAM
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Product Folder Link(s): TSB81BA3E