Datasheet

TSB81BA3E
www.ti.com SLLS783A –MAY 2009–REVISED MAY 2010
Table 4. Page 0 (Port Status) Register Field Descriptions (continued)
FIELD SIZE TYPE DESCRIPTION
Max_port_speed
The maximum speed at which a port is allowed to operate in Beta mode. The encoding is:
000 = S100
001 = S200
010 = S400
011 = S800
100 = S1600
101 = S3200
Max_port_speed 3 Rd/Wr
110 = reserved
111 = reserved
An attempt to write to the register with a value greater than the hardware capability of the port results
in the maximum value that the port is capable of being stored in the register. The port uses this
register only when a new connection is established in the Beta mode or when a port is programmed
as a Beta-only port. When a port is programmed as a bilingual port, it is fixed at S400 for the Beta
speed and is not updated by a write to this register. The power reset value is the maximum speed
capable of the port. Software can modify this value to force a port to train at a lower-than-maximum
speed (when in a Beta-only mode), but no lower than the minimum speed.
LPP(Local_plug_
1 Rd This flag is set permanently to 1.
present)
This variable is set to the maximum speed that the port is capable of. The encoding is the same as for
Cable_speed 3 Rd
Max_port_speed.
Connection_ If this bit is set to 1, then a Beta-mode speed negotiation has failed or synchronization has failed. A
1 Rd/Wr
unreliable write of 1 to this field resets the value to 0.
Operating in Beta mode. If this bit is 1, the port is operating in Beta mode; it is equal to 0 otherwise
Beta_mode 1 Rd (that is, when operating in 1394a-2000 mode, or when disconnected). If Con is 1, RxOK is 1, and
Beta_mode is 0, then the port is active and operating in the 1394a-2000 mode.
Incremented when the port receives an invalid codeword, unless the value is already 255. Cleared
Port_error 8 Rd/Wr when read (including being read by means of a remote access packet). Intended for use by a single
bus-wide diagnostic program.
This bit is set to 1 if the port has been placed in the loop-disable state as part of the loop-free build
Loop_disable 1 Rd process (the PHYs at either end of the connection are active, but if the connection itself were
activated, then a loop would exist). Cleared on bus reset and on disconnection.
In_standby 1 Rd This bit is set to 1 if the port is in standby power-management state.
No effect unless the port is disabled. If this bit is set to 1, the port does not maintain connectivity
status on an ac connection when disabled. The values of the Con and RxOK bits are forced to 0. This
Hard_disable 1 Rd/Wr flag can be used to force renegotiation of the speed of a connection. It can also be used to place the
device into a lower-power state because when hard-disabled, a port no longer tones to maintain
1394b ac-connectivity status.
The vendor identification page identifies the vendor/manufacturer and compliance level. The page is selected by
writing 1 to the Page_Select field in base register 7. Table 5 shows the configuration of the vendor identification
page, and Table 6 shows the corresponding field descriptions.
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