Datasheet

TPAx+
TPBx+
TPAx−
TPBx−
56 Ω
t
h
t
su
Dx, CTLx, LREQ
xCLK
t
d
Dx, CTLx
xCLK
TSB81BA3E
SLLS783A –MAY 2009–REVISED MAY 2010 www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 1. Test Load Diagram
Figure 2. Dx, CTLx, LREQ Input Setup and Hold Time Waveforms
Figure 3. Dx and CTLx Output Delay Relative to xCLK Waveforms
16 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TSB81BA3E