Datasheet

TSB81BA3D, TSB81BA3DI
IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
SLLS559E − DECEMBER 2002 − REVISED JUNE 2006
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Table 4. Page 0 (Port Status) Register Field Descriptions
FIELD SIZE TYPE DESCRIPTION
Astat 2 Rd TPA line state. This field indicates the instantaneous TPA line state of the selected port, encoded
as follows:
Code Arb Value
11 Z
01 1
10 0
00 invalid
Bstat 2 Rd TPB line state. This field indicates the TPB line state of the selected port. This field has the same
encoding as the AStat field.
Ch 1 Rd Child/parent status. A 1 indicates that the selected port is a child port. A 0 indicates that the selected
port is the parent port. A disconnected, disabled, or suspended port is reported as a child port. The
Ch bit is invalid after a bus-reset until tree-ID has completed.
Con 1 Rd Debounced port connection status. This bit indicates that the selected port is connected. The
connection must be stable for the debounce time of approximately 341 ms for the Con bit to be set
to 1. The Con bit is reset to 0 by hardware reset and is unaffected by bus-reset.
NOTE: The Con bit indicates that the port is physically connected to a peer PHY, but this does not
mean that the port is necessarily active. For 1394b-coupled connections, the Con bit is set when a
port detects connection tones from the peer PHY and operating speed negotiation is completed.
RxOK 1 Rd Receive OK. In 1394a−2000 mode this bit indicates the reception of a debounced TPBias signal.
In Beta_mode, this bit indicates the reception of a continuous electrically valid signal.
Note: RxOK is set to false during the time that only connection tones are detected in beta mode.
Dis 1 Rd/Wr Port disabled control. If this bit is 1, then the selected port is disabled. The Dis bit is reset to 0 by
hardware reset (all ports are enabled for normal operation following hardware reset). The Dis bit is
not affected by bus-reset. When this bit is set, the port cannot become active; however, the port still
tones, but does not establish an active connection.
Negotiated_speed 3 Rd Indicates the maximum speed negotiated between this PHY port and its immediately connected port.
The encoding is as for Max_port_speed. It is set on connection when in Beta_mode, or to a value
established during self-ID when in 1394a−2000 mode.
PIE 1 Rd/Wr Port event interrupt enable. When this bit is 1, a port event on the selected port sets the port event
interrupt (PEI) bit and notifies the link. This bit is reset to 0 by a hardware reset, and is unaffected
by bus-reset.
Fault 1 Rd/Wr Fault. This bit indicates that a resume-fault or suspend-fault has occurred on the selected port, and
that the port is in the suspended state. A resume-fault occurs when a resuming port fails to detect
incoming cable bias from its attached peer. A suspend-fault occurs when a suspending port
continues to detect incoming cable bias from its attached peer. Writing 1 to this bit clears the Fault
bit to 0. This bit is reset to 0 by hardware reset and is unaffected by bus-reset.
Standby_fault 1 Rd/Wr This bit is set to 1 if an error is detected during a standby operation and cleared on exit from the
standby state. A write of 1 to this bit or receipt of the appropriate remote command packet clears it
to 0. When this bit is cleared, standby errors are cleared.
Disscrm 1 Rd/Wr Disable scrambler. If this bit is set to 1, then the data sent during packet transmission is not
scrambled.
B_Only 1 Rd Beta-mode operation only. For the TSB81BA3D, this bit is set to 0 for all ports.
DC_connected 1 Rd If this bit is set to 1, the port has detected a dc connection to the peer port by means of a 1394a-style
connect detect circuit.