Datasheet

311
3.15 OHCI Control Register
The PCI OHCI control register is defined by the 1394 Open Host Controller Interface Specification and provides a
bit for big endian PCI support. See Table 313 for a complete description of the register contents.
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name OHCI control
Type R R R R R R R R R R R R R R R R
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name OHCI control
Type R R R R R R R R R R R R R R R R/W
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register: OHCI control
Offset: 40h
Type: Read/Write, read-only
Default: 0000 0000h
Table 313. OHCI Control Register Description
BIT FIELD NAME TYPE DESCRIPTION
311 RSVD R Reserved. Bits 311 return 0s when read.
0 GLOBAL_SWAP R/W When bit 0 is set to 1, all quadlets read from and written to the PCI interface are byte-swapped (big
endian).
3.16 Capability ID and Next Item Pointer Registers
The capability ID and next item pointer register identifies the linked-list capability item and provides a pointer to the
next capability item. See Table 314 for a complete description of the register contents.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name Capability ID and next item pointer
Type R R R R R R R R R R R R R R R R
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Register: Capability ID and next item pointer
Offset: 44h
Type: Read-only
Default: 0001h
Table 314. Capability ID and Next Item Pointer Registers Description
BIT FIELD NAME TYPE DESCRIPTION
158 NEXT_ITEM R Next item pointer. The TSB43AB23 device supports only one additional capability that is
communicated to the system through the extended capabilities list; therefore, this field returns 00h
when read.
70 CAPABILITY_ID R Capability identification. This field returns 01h when read, which is the unique ID assigned by the PCI
SIG for PCI power-management capability.