Datasheet

3–10

3.12 CardBus CIS Pointer Register

CARDBUS to the TSB43AB22A device is sampled at G_RST to determine the TSB43AB22A application. If

CARDBUS

is sampled high, this register is read-only returning 0s when read. If CARDBUS is sampled low, this

description of the register contents.

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Name CardBus CIS pointer

Type R R R R R R R R R R R R R R R R

Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Name CardBus CIS pointer

Type R R R R R R R R R R R R R R R R

Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Offset: 28h

Type: Read-only

Default: 0000 0000h

Table 3–11. CardBus CIS Pointer Register Description

BIT FIELD NAME TYPE DESCRIPTION

31–28 ROM_IMAGE R Since the CIS is not implemented as a ROM image, this field returns 0s when read.

27–3 CIS_OFFSET R This field indicates the offset into the CIS address space where the CIS begins, and bits 7–3 are

loaded from the serial EEPROM field CIS_Offset (7–3). This implementation allows the

TSB43AB22A device to produce serial EEPROM addresses equal to the lower PCI address byte to

acquire data from the serial EEPROM.

2–0 CIS_INDICATOR R This field indicates the address space where the CIS resides and returns 011b if CARDBUS is

sampled low at G_RST

. 011b indicates that CardBus CIS base address register at offset 18h in the

PCI configuration header contains the CIS base address. If CARDBUS

is sampled high at G_RST,

this field contains 000b.