Datasheet

9–4
9.4 Electrical Characteristics Over Recommended Ranges of Operating Conditions
(unless otherwise noted)
9.4.1 Device
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
S l t(it l lt lt bld
See Note 4 92.4
I
DD
Supply current (internal voltage regulator enabled,
REG EN = L)
See Note 5 81.2
mA
I
DD
REG
_
EN
=
L)
See Note 6 76.8
mA
S l t (REG EN H t l 1 8 V li d
See Note 4 85.5
I
DD
Supply current (REG_EN = H, external 1.8 V supplied
to REG18)
See Note 5 74.1
mA
I
DD
t
o
REG18)
See Note 6 69.8
mA
I
DD(ULP)
Supply current—ultralow power mode (internal voltage
regulator enabled, REG_EN = L)
Ports disabled
V
DD
= 1.8 V (internal)
T
A
= 25°C
3 mA
I
DD(ULP)
Supply current—ultralow power mode (internal voltage
regulator disabled, REG_EN = H, REG18 = 1.8 V)
Ports disabled
V
DD
= 1.8 V (external)
T
A
= 25°C
1.8 mA
V
TH
Power status threshold, CPS input
†
400-kΩ resistor
†
4.7 7.5 V
V
O
TPBIAS output voltage At rated I
O
current 1.665 2.015 V
I
I
Input current (PC0–PC2 inputs) V
DD
= 3.6 V 5 µA
I
Pullup current (G RST input)
V
I
= 1.5 V –90 –20
A
I
IRST
Pullup current (G_RST input)
V
I
= 0 V –90 –20
µA
†
Measured at cable power side of resistor.
NOTES: 4. Transmit (all ports transmit, 100% bandwidth, S400), V
DD
= 3.3 V, T
A
= 25°C
5. Repeat data (receive on one port, transmit on other port, full isochronous payload of 84 µs, S400, data value of CCCC CCCCh),
V
DD
= 3.3 V, T
A
= 25°C
6. Idle (receive cycle start on one port, transmit cycle start on other port), V
DD
= 3.3 V, T
A
= 25°C
9.4.2 Driver
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
OD
Differential output voltage 56 Ω, see Figure 9–1 172 265 mV
I
DIFF
Driver difference current, TPA+, TPA–, TPB+, TPB– Drivers enabled, speed signaling off –1.05
‡
1.05
‡
mA
I
SP200
Common-mode speed signaling current, TPB+, TPB– S200 speed signaling enabled –4.84
§
–2.53
§
mA
I
SP400
Common-mode speed signaling current, TPB+, TPB– S400 speed signaling enabled –12.4
§
–8.1
§
mA
V
OFF
Off state differential voltage Drivers disabled, see Figure 9–1 20 mV
‡
Limits defined as algebraic sum of TPA+ and TPA– driver currents. Limits also apply to TPB+ and TPB– algebraic sum of driver currents.
§
Limits defined as absolute limit of each of TPB+ and TPB– driver currents.
TPAx+
TPBx+
TPAx–
TPBx–
56 Ω
Figure 9–1. Test Load Diagram