Datasheet


    
SLLS363A − SEPTEMBER 1999 − REVISED NOVEMBER 2000
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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76
77
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81
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46
45
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AGND
TPBIAS4
TPA4+
TPB4+
TPBIAS3
TPA3+
TPA3−
TPB3+
TPB3−
TPBIAS2
TPA2+
TPB2+
TPB2−
TPBIAS1
TPA1+
TPA1−
TPB1+
TPB1−
AGND
DGND
LREQ
SYSCLK
DGND
CTL0
CTL1
D1
D2
D3
D4
D5
D6
D7
CNA
PD
LPS
DGND
DGND
RESET
XI
PLLGND
PLLGND
TPBIAS5
TPA5+
R1
R0
AGND
AGND
AGND
DGND
C/LKON
PC0
PC1
PC2
ISO
CPS
TPB0+
TPA0−
TPA0+
TPBIAS0
TESTM
SM
AGND
AGND
AGND
SE
PZP PACKAGE
(TOP VIEW)
DGND
DV
DD
TPA5−
FILTER1
FILTER0
TPB4−
DGND
AV
DD
AV
DD
TPA2−
AV
DD
DV
DD
DV
DD
D0
V
DD−5V
DV
DD
DGND
DD
DV
XO
DD
PLLV
TPB5+
TPB5−
DD
AV
DD
AV
DD
AV
DD
AV
DD
DV
DD
DV
TPB0−
DD
AV
DD
AV
AGND
AGND
TPA4−
TSB41LV06A
AGND
Terminal Functions
TERMINAL
TYPE
I/O
DESCRIPTION
NAME NO.
TYPE
I/O
DESCRIPTION
AGND 46, 47, 48, 49,
50, 51, 75, 76,
81, 82, 90
Supply Analog circuit ground terminals. These terminals should be tied together to the low
impedance circuit board ground plane.
AV
DD
44, 45, 57, 63,
69, 77, 78, 79,
80
Supply Analog circuit power terminals. A combination of high frequency decoupling capacitors near
each terminal is suggested, such as paralleled 0.1 µF and 0.001 µF. Lower frequency 10 µF
filtering capacitors are also recommended. These supply terminals are separated from
PLLV
DD
and DV
DD
internal to the device to provide noise isolation. They should be tied at a
low impedance point on the circuit board.